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* [[Connecting to convey-1.ece.iastate.edu]]
* [[Connecting to convey-1.ece.iastate.edu]]
* [[Convey environment setup|Setting Up Environment Variables on Convey's HC-1]]
* [[Convey environment setup|Setting Up Environment Variables on Convey's HC-1]]
* [[Convey PDK Tutorial]]
* [[Media:Tutorial2.pdf | Convey Floating Point Addition Tutorial (.pdf)]]
* [[Test Benches | Use Test Benches to test components of your Personality]]
* [[Using the Memory Controller Interface]]
* [[Running the Vector Adder Example Application]]
* [[Running the Vector Adder Example Application]]
* Convey pdk tutorial: [[image:ConveyTutorial1.pdf]] (uses newCnyProject script)
<!-- * Convey pdk tutorial: [[image:ConveyTutorial1.pdf]] (uses newCnyProject script) -->
* [[Analyze the Simpleton Basic App]]
* [[Analyze the Simpleton Basic App]]
* [[Tutorial: Creating a Custom Bitfile | Create a Custom Bitfile]]
* [[Tutorial: Creating a Custom Bitfile | Create a Custom Bitfile]]
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* [[Using GPROF]]
* [[Using GPROF]]
* [[Convey vector example | Example of Loop Unrolling using FPGA]]
* [[Convey vector example | Example of Loop Unrolling using FPGA]]
* '''[[Frequently Asked Questions]]'''
== Projects ==
* [[Ideas Page | Project Ideas Page]]
* [[Sobel Algorithm | Speeding up Sobel Algorithm]]
* [[Sobel Algorithm | Speeding up Sobel Algorithm]]


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* [http://www.fpga.com.cn/hdl/training/verilog%20reference%20guide.pdf The Verilog Golden Reference]
* [http://www.fpga.com.cn/hdl/training/verilog%20reference%20guide.pdf The Verilog Golden Reference]
* [http://courseware.ee.calpoly.edu/~bmealy/shock_awe_vhdl_adobe.pdf "The Shock and Awe" VHDL Tutorial]
* [http://courseware.ee.calpoly.edu/~bmealy/shock_awe_vhdl_adobe.pdf "The Shock and Awe" VHDL Tutorial]
* [http://www.ece.msstate.edu/~reese/EE4743/lectures/verilog_intro_2002/verilog_intro_2002.pdf Verilog vs. VHDL]
* [http://esd.cs.ucr.edu/labs/tutorial/ VHDL Simple Code Examples]
* [http://esd.cs.ucr.edu/labs/tutorial/ VHDL Simple Code Examples]
* [http://www.seas.upenn.edu/~ese171/vhdl/vhdl_primer.html VHDL Primer]
* [http://www.seas.upenn.edu/~ese171/vhdl/vhdl_primer.html VHDL Primer]
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*[[Media:Brief_Bioinform-2010-Li-473-83.pdf|A survey on algorithms for sequencing]]
*[[Media:Brief_Bioinform-2010-Li-473-83.pdf|A survey on algorithms for sequencing]]
*[[Media:Gb-2009-10-3-r25.pdf|Burrows-Wheeler indexing]]
*[[Media:Gb-2009-10-3-r25.pdf|Burrows-Wheeler indexing]]
== Spring 2013 Teams ==
* [[Team Cyc05]]
* [[Team Challenger]]
* [[Team Blitz]]


== Spring 2012 Teams ==
== Spring 2012 Teams ==
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* [[Team Slytherin]]
* [[Team Slytherin]]
* [[Team 142857]]
* [[Team 142857]]
== Spring 2013 Teams ==
* [[Team Cyc05]]
* [[Team Challenger]]
* [[Team Blitz]]

Latest revision as of 03:43, 13 May 2013

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