Main Page: Difference between revisions
Jump to navigation
Jump to search
| Line 24: | Line 24: | ||
== Reference Manuals == | == Reference Manuals == | ||
=== Convey === | === Convey === | ||
* [[Media:ConveyPDKReferenceManual.pdf | Convey PDK Reference Manual (.pdf)]] (updated to V5; | * [[Media:ConveyPDKReferenceManual.pdf | Convey PDK Reference Manual (.pdf)]] (updated to V5.2; April 2012) | ||
* [[Media:ConveyProgrammersGuide.pdf | Convey Programmers Guide (.pdf)]] (updated to V1.8; November 2010) | * [[Media:ConveyProgrammersGuide.pdf | Convey Programmers Guide (.pdf)]] (updated to V1.8; November 2010) | ||
* [[Media:ConveyReferenceManual.pdf | Convey Reference Manual (.pdf)]] | * [[Media:ConveyReferenceManual.pdf | Convey Reference Manual (.pdf)]] | ||
Revision as of 04:30, 17 September 2012
Teams
Articles
HC-1 Tutorials
- Connecting to convey-1.ece.iastate.edu
- Setting Up Environment Variables on Convey's HC-1
- Running the Vector Adder Example Application
- Create a Custom Bitfile
- Using a Custom Bitfile in C Code
- Adding VHDL Files to a Project
- The Verilog Hardware Interface for CAE
- Using SPAT
- Using GPROF
- Example of Loop Unrolling using FPGA
- Speeding up Sobel Algorithm
Other Articles
Reference Manuals
Convey
- Convey PDK Reference Manual (.pdf) (updated to V5.2; April 2012)
- Convey Programmers Guide (.pdf) (updated to V1.8; November 2010)
- Convey Reference Manual (.pdf)
- Convey SPAT (Simulator Performance Analysis Tool) Guide
- Convey PDK (.pdf)
- Convey Overview (.pdf)
- Convey Overview (.pdf)
The newet version of these documents are available at Convey's Support Site
CUDA
Links
Helpful Guides
- "The Shock and Awe" VHDL Tutorial
- VHDL Simple Code Examples
- VHDL Primer
- Using VHDL components in Verilog