Main Page: Difference between revisions
Jump to navigation
Jump to search
No edit summary |
|||
| Line 53: | Line 53: | ||
* [http://courseware.ee.calpoly.edu/~bmealy/shock_awe_vhdl_adobe.pdf "The Shock and Awe" VHDL Tutorial] | * [http://courseware.ee.calpoly.edu/~bmealy/shock_awe_vhdl_adobe.pdf "The Shock and Awe" VHDL Tutorial] | ||
* [http://esd.cs.ucr.edu/labs/tutorial/ VHDL Simple Code Examples] | * [http://esd.cs.ucr.edu/labs/tutorial/ VHDL Simple Code Examples] | ||
* [http://www.seas.upenn.edu/~ese171/vhdl/vhdl_primer.html VHDL Primer] | |||
* [http://www.kxcad.net/electronic_Xilinx_guide/mergedProjects/xsim/html/xs_p_ml_instantiation.htm Using VHDL components in Verilog] | * [http://www.kxcad.net/electronic_Xilinx_guide/mergedProjects/xsim/html/xs_p_ml_instantiation.htm Using VHDL components in Verilog] | ||
==Readings for Memocode 2012== | ==Readings for Memocode 2012== | ||
*[[Media:Brief_Bioinform-2010-Li-473-83.pdf|A survey on algorithms for sequencing]] | *[[Media:Brief_Bioinform-2010-Li-473-83.pdf|A survey on algorithms for sequencing]] | ||
*[[Media:Gb-2009-10-3-r25.pdf|Burrows-Wheeler indexing]] | *[[Media:Gb-2009-10-3-r25.pdf|Burrows-Wheeler indexing]] | ||
Revision as of 20:47, 10 June 2012
Teams
Articles
HC-1 Tutorials
- Connecting to convey-1.ece.iastate.edu
- Setting Up Environment Variables on Convey's HC-1
- Running the Vector Adder Example Application
- Create a Custom Bitfile
- Using a Custom Bitfile in C Code
- Adding VHDL Files to a Project
- The Verilog Hardware Interface for CAE
- Using SPAT
- Using GPROF
- Example of Loop Unrolling using FPGA
- Speeding up Sobel Algorithm
Other Articles
Reference Manuals
Convey
- Convey PDK Reference Manual (.pdf) (updated to V5; November 2011)
- Convey Programmers Guide (.pdf) (updated to V1.8; November 2010)
- Convey Reference Manual (.pdf)
- Convey SPAT (Simulator Performance Analysis Tool) Guide
- Convey PDK (.pdf)
- Convey Overview (.pdf)
- Convey Overview (.pdf)
The newet version of these documents are available at Convey's Support Site
CUDA
Links
Helpful Guides
- "The Shock and Awe" VHDL Tutorial
- VHDL Simple Code Examples
- VHDL Primer
- Using VHDL components in Verilog