Tutorials: Difference between revisions
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==Digital Tutorials== | ==Digital Tutorials== | ||
Cadence SoC RTL Compiler - Synthesize verilog to schematic | *[[Cadence SoC RTL Compiler]] - Synthesize verilog to schematic | ||
Cadence SoC Place and Route | *[[Cadence SoC Place and Route]] - Generate layout for synthesized netlist | ||
==Misc== | ==Misc== | ||
Revision as of 20:53, 8 January 2010
Analog/Mixed-Signal Software Tutorials
- icfb setup - How to set up and run Cadence Virtuoso front-to-back IC design toolset for the first time
- Neocircuit setup - Setup for Neocircuit, a sophisticated circuit-optimization tool
Analog Simulation Techniques
- Temperature sensor test - Test benches / equations for temp sensor performance measurements
- Data converter test - Methods for testing the performance of ADCs and DACs
Digital Tutorials
- Cadence SoC RTL Compiler - Synthesize verilog to schematic
- Cadence SoC Place and Route - Generate layout for synthesized netlist