Running the Vector Adder Example Application

Section 10.5 of the Convey PDK Reference Manual (.pdf) explains how to run the sample software application. It has been reproduced below in brief.

Compiling the Project

The rev version installed on the Convey machine is from 2011-11-22; to copy the sample app's source code run:

cd ~
mkdir pdk_sample
cp -r /opt/convey/pdk/latest/hc-1/examples/* pdk_sample

To make the sample project, first make sure you have setup your environment variables, then run:

cd ~/pdk_sample/cae_pers_vadd/SampleAppVadd/
make

This compiles both an emulator (CaeSimPers) and a C program that makes a coprocessor call to use the vector adder (UserApp.exe).

Run the Project

Projects typically contain the following three executables:

1. A software simulation of the FPGA design
2. A hardware simulation (ModelSim) of the FPGA design
3. The actual implementation (C code, Verilog code). The bitfile was previously compiled, nicknamed, and added to a known file location.

There are some scripts that can be used to run the various projects.

The runcp (i.e. run coprocessor) script located in the SampleAppVadd can be used to run the application in HW which sets the appropriate environment variables and runs the UserApp.exe:

  ./runcp

The run script located in the SampleAppVadd can be used to run the application in SW.

Either script can be used to run the application on Simulator using the "-vsim" option which sets the environment variable CNY_CAE_EMULATOR to ./run_simulation:

  ./runcp -vsim
      or
  ./run -vsim

To summarize the important environment variables:

Environment Variables	Software	ModelSim	Hardware
CNY_SIM_THREAD	libcpSimLib2.so	libcpSimLib2.so	unset
CNY_CAE_EMULATOR	<location for CaeSimPers>	./run_simulation	unset