LNA Performance Simulations

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Revision as of 18:45, 15 March 2011 by Neihart (Talk | contribs) (IIP3 and 1-dB Compression Simulation)

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Power Consumption

  • Ground both the input and output of your LNA. If there is no DC blocking capacitor at the output then leave it open-circuited.
  • Using the Analog Design Environment choose to run a dc simulation and make sure that Save DC Operation Point is selected.
  • Run the simulation. When it is finished click Results -> Print -> DC Operating Points
  • Click on the DC voltage source and note the delivered power.

S-Parameter Simulations

  • You must first instantiate ports at both the input and output of the LNA (analogLib -> Sources -> Independent -> port).
  • Edit the properties of the input port
    • Set the Resistance to 50 Ω and the Port number to 1.
    • Set the Source type to dc.
  • Edit the properties of the output port
    • Set the Resistance to 50 Ω and set the Port number to 2.
    • Set the Source type to dc.
  • In the Analog Design Environment and choose the sp analysis type.
    • Click the Port Select button and select the input and output port on the schematic.
    • Set the Sweep Variable to Frequency
    • Set the Sweep Range to Start-Stop and enter 1.5G for the Start value and 3.5G for the Stop value.
    • Set the Sweep Type to Linear and the Number of Steps to 1000.
    • Leave the Do Noise set to no.
    • Click OK
  • Run the simulation
  • To plot the results click Results -> Direct Plot -> Main Form ...
    • Make sure that the Analysis is sp and the Function is SP
    • Select Plot Type as Rectangular
    • Set the Modifier to dB20
    • Now simply click the button corresponding to the parameter you wish to plot.

Noise Figure using S-parameter Simulation

  • Follow steps 1 – 4d from the S-parameter simulation instructions above.
  • In the sp Choosing Analyses window, set Do Noise to yes
    • Select the Output Port
    • Select the Input Port
    • Click OK
  • Run the simulation
  • To plot the results click Results -> Direct Plot -> Main Form ...
    • Make sure that the Analysis is sp and the Function is NF
    • Set the Modifier to dB10
    • Click on Plot

IIP3 and 1-dB Compression Simulation

  • You must first instantiate ports at both the input and output of the LNA (analogLib -> Sources -> Independent -> port)
  • Edit the properties of the input port
    • Set the Resistance to 50 Ω
    • Set the Port number to 1
    • Source type should be sine
    • Fill in fund1 for the Frequency name 1
    • Frequency 1 should be 2.4G
    • This is the frequency of the desired signal
    • Fill in prf for Amplitude 1 (dBm)
    • This is a variable name (to be defined later) of the power of the input signal
    • Click on Display second sinusoid
    • Fill in fund2 for Frequency name 2
    • Frequency 2 should be 2.42G
    • This is the frequency of the second tone or “blocker”
    • Fill in prf for Amplitude 2 (dBm)
    • This sets the power of the blocker equal to the power of the input signal
    • Click OK
  • Edit the properties of the output port
    • Set the Resistance to 50 Ω and the Port number to 2
    • Set the Source type to dc
  • In the Analog Design Environment we need to enable the pss analysis
    • Verify that fund1 and fund2 are displayed in the Fundamental Tones section.
    • Select Beat Frequency and click Auto Calculated
      • The beat frequency should be 20 MHz, this is the greatest common divisor of fund1 and fund2
    • Select Number of harmonics under Output harmonics and fill in the value of 123
      • This field defines the number of harmonics of the beat frequency that the simulation will consider. For IIP3 tests we need to consider up to the frequency (2*2.42GHz – 2.4GHz = 2.44GHz). This means that we need 122 harmonics of the beat frequency (2.44GHz / 20MHz = 122). We use 123 harmonics to go one harmonic higher.
    • Set the Accuracy Defaults (errpreset) to conservative
    • Set the Additional Time for Stabilization (tstab) to 20n
      • This allows any startup transients to settle before calculating the IIP3
    • Click Sweep
    • Choose Variable and check no for Frequency Variable?
    • Fill in prf for the variable name
      • This is the variable defining the power of both the input and blocker signals
    • Check Start-Stop under Sweep Range and fill in -50 for Start and 0 for Stop
    • Set the Sweep Type to Linear and set the Step Size to 5
    • Click OK
  • Run the simulation
  • To view the results for IIP3 click Results -> Direct Plot -> Main Form ...
    • Set the Analysis to pss
    • Set the Function to IPN Curves
    • Make sure that Select Port ( fixed R(port) ) is set
    • Click Variable Sweep (“prf”) for Circuit Input Power
    • Enter -25 for Input Power Extrapolation Point (dBm)
      • Some experimentation might be in order. You want the resulting extrapolated line to match well with the straight portion of the IM3 components at low power.
    • Select Input Referred IP3 and Order 3rd
    • Select either 2.44G (2*2.42G – 2.4G) or 2.38G (2*2.4G – 2.42G) for the 3rd Order Harmonic
    • Select 2.4G for the 1st Order Harmonic
    • Select the output port on the schematic
    • You Should get a plot similar to Fig. 1 below
      • Note that I use AWD whereas the default waveform viewer in Cadence is Wavescan.
  • To View the results for the 1-dB compression point click Results -> Direct Plot -> Main Form ...
    • Set the Analysis to pss
    • Set the Function to Compression Point
    • Check that Select Port ( fixed R(port) ) is set
    • Select Output Power for Format
    • Enter 1 for Gain Compression (dB)
      • We are interested in the 1-dB compression point after all
    • Enter -25 for Input Power Extrapolation Point (dBm)
      • Again some experimentation might be in order
    • Select Input Referred 1 dB Compression
    • Under the 1st Order Harmonics select 2.4G
    • Select the output Port on the schematic
    • The resulting plot should look similar to Fig. 2 below.


Figure1.png

Figure 1: Sample IIP3 plot

Figure2.png

Figure 2: 1-dB Compression Point