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Welcome to the Reconfigurable Computing wiki.

Upcoming Deadlines

Conference	Duration	Location	Abstract Deadline	Paper Deadline	Notification
ARC	Apr 14-17, 2015	Bochum, Germany	Nov 12, 2014	Nov 12, 2014	Dec 5, 2014
ICPP	Mar 30-31, 2015	Paris, France	Oct 31, 2014	Oct 31, 2014	Nov 29, 2014
ISCA	Jun 13-17, 2015	Portland, OR, USA	Nov 18, 2014	Nov 25, 2014	Mar 06, 2015
DAC	Jun 07-11, 2015	San Francisco, CA, USA	Nov 21, 2014	Dec 02, 2014	Feb 17, 2015
GLSVLSI	May 20-22, 2015	Pittsburgh, PA, USA	Dec 09, 2014	Dec 09, 2014	Feb 03, 2015
FCCM	May 03-05, 2015	Vancouver, Canada	Jan 06, 2015	Jan 06, 2015	Mar 02, 2015
RAW	May 25-25, 2015	Hyderabad, India	Jan 06, 2015	Jan 06, 2015	Feb 01, 2015
HPDC	Jun 15-19, 2015	Portland, OR, USA	Jan 12, 2015	Jan 19, 2015	Mar 16, 2015
ISVLSI	Jul 08-10, 2015	Montpellier, France	Feb 25, 2015	Feb 25, 2015	Apr 20, 2015
MWSCAS	Aug 02-05, 2015	Fort Collins, CO, USA	Mar 09, 2015	Mar 09, 2015	Apr 20, 2015
HP3C	Sep 23-25, 2015	Aizu, Japan	Mar 31, 2015	Mar 31, 2015	May 31, 2015

Possible target conferences

• H5-index from Google Scholar Metrics

Conference	H5-index	H5-Median	Conference Name
IPDPS	45	59	IEEE Int'l Parallel and Distributed Processing Symposium
ARC	12	17	Int'l Symposium on Applied Reconfigurable Computing
ICCD	18	20	IEEE Int'l Conference on Computer Design
ISCA	53	98	Int'l Symposium on Computer Architecture
MWSCAS	15	23	IEEE Int'l Midwest Symposium on Circuits and Systems

GPGPU Sim

• How To: Checkout the Project and Make

FPGA Design Flow

Xilinx Resources

• Spartan6 CLB Guide
• Spartan6-specific HDL primitives
• Spartan3-specific HDL primitives
• Xilinx Constraints Guide

Xilinx AXI/AXI-lite Bus Resources

• AXI Interconnect Manual
• AXI-lite IP Interface Manual
• AXI Performance Monitor Manual

Chipscope

• Using AXI Monitor
  • Chipscope AXI Monitor is a wrapper for the Chipscope Logic Analyzer, which itself can be used to monitor arbitrary internal signals in a running system.

Command-line Processing

• Digilent board config tool
  • Presents a command line alternative to Adept
• Xilinx Command Line Tools Users Guide
  • Any process you run in ISE can also be automated from the command line!
• FPGA_Edline
  • Scripted editing can be performed through the command line version of FPGA Editor

FPGA Editor Tasks

• Creating Hard Macros
• Preserve Routing With Constraints

Setup file for ISE 14 + Vivado

• Setup.sh script

Convey HC-1/HC-2

• Convey Tutorials on CprE 584 Course Wikipedia

FPGA Decapping

Decapped Pictures

• Decapping Pictures
  • Wiki Page Containing Pictures of decapping process

Decapping Process

• Acid Etching Documentation

Software Defined Radio Radiometer

SDR Setup and configuration

• Installing GNURadio and GNURadio Companion
• Setup of the N200 SDR

Testing and Calibration

• Testing the SDR Radiometer
• Testing results from Spring 2014
• Data processing

EE 518 Lab setup

• Setup of the EE 518 Lab
• Lab documentation