Using AXI Monitor

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Revision as of 05:19, 4 December 2014 by Ajmills (talk | contribs) (New page: These instructions are geared towards using the Chipscope with a Zynq 7000 chip in mind, but in general it can be applied to nearly any Xilinx FPGA. It's also assuming that development is ...)
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These instructions are geared towards using the Chipscope with a Zynq 7000 chip in mind, but in general it can be applied to nearly any Xilinx FPGA. It's also assuming that development is done on one of the Linux servers, connecting to the Zedboard using the hw_server tool (as in the CprE488 labs)

There are two IP blocks which need to be added to the project. Here we're using XPS, but these could be added in a regular ISE project too.

  • Chipscope Integrated Controller ("chipscope_icon")
  • Chipscope AXI Monitor