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Welcome to the Reconfigurable Computing wiki.

Upcoming Deadlines

Conference	Duration	Location	Paper Deadline	Abstract Deadline	Notification
HPEC	Sep 15-17, 2015	Waltham, MA, USA	May 15, 2015		June 10, 2015
HiPC	Dec 16-19, 2015	Bangalore, India	Jun 05, 2015		Sep 04, 2015
ICPADS	Dec 14-17, 2015	Melbourne, Australia	Jul 01, 2015		Sep 05, 2015
FPT	Dec 07-09, 2015	Queenstown, New Zealand	Jul 05, 2015		Sep 07, 2015
Reconfig	Dec 07-09, 2015	Mayan Riviera, Mexico	Jul 17, 2015		Sep 16, 2015
Reconfig PhD Forum	Dec 07-09, 2015	Mayan Riviera, Mexico	Jul 17, 2015		Sep 18, 2015
IPCCC	Dec 14-16, 2015	Nanjing, China	Aug 31, 2015	Aug 24, 2015	Oct 10, 2015
FPT PhD Forum	Dec 07-09, 2015	Queenstown, New Zealand	Sep 20, 2015		Oct 12, 2015

Possible target conferences

• H5-index from Google Scholar Metrics

Conference	H5-index	H5-Median	Conference Name
IPDPS	45	59	IEEE Int'l Parallel and Distributed Processing Symposium
ICDCS	36	49	IEEE Int'l Conference on Distributed Computing Systems
ARC	12	17	Int'l Symposium on Applied Reconfigurable Computing
ICCD	18	20	IEEE Int'l Conference on Computer Design
ISCA	53	98	Int'l Symposium on Computer Architecture
MWSCAS	15	23	IEEE Int'l Midwest Symposium on Circuits and Systems
FCCM
HPCC	17	25	IEEE Int'l Conference on High Performance Computing and Communications
RAW
DAC
HPDC

Possible target journals

• ACM Transactions on Reconfigurable Technology and Systems (ACM TRETS)
• International Journal of Reconfigurable Computing (IJRC)
• IEEE Transactions on Parallel and Distributed Systems (IEEE TPDS)

OpenCV install from source

1. If cross-compiling, make sure you source a setup.sh that defines the cross-compiler environment. Set the corresponding environmental variables:
   

>> export CROSS_COMPILE=arm-xilinx-linux-gnueabi-
>> export ARCH=arm

GPGPU Sim

• How To: Checkout the Project and Make

FPGA Design Flow

Xilinx Resources

• Spartan6 CLB Guide
• Spartan6-specific HDL primitives
• Spartan3-specific HDL primitives
• Xilinx Constraints Guide
• How to Use Relationally Placed Macros

Xilinx AXI/AXI-lite Bus Resources

• AXI Interconnect Manual
• AXI-lite IP Interface Manual
• AXI Performance Monitor Manual

Chipscope

• Using AXI Monitor
  • Chipscope AXI Monitor is a wrapper for the Chipscope Logic Analyzer, which itself can be used to monitor arbitrary internal signals in a running system.

Command-line Processing

• Digilent board config tool
  • Presents a command line alternative to Adept
• Xilinx Command Line Tools Users Guide
  • Any process you run in ISE can also be automated from the command line!
• FPGA_Edline
  • Scripted editing can be performed through the command line version of FPGA Editor

FPGA Editor Tasks

• Creating Hard Macros
• Preserve Routing With Constraints

Setup file for ISE 14 + Vivado

• Setup.sh script

Convey HC-1/HC-2

• Convey Tutorials on CprE 584 Course Wikipedia

FPGA Decapping

Decapped Pictures

• Decapping Pictures
  • Wiki Page Containing Pictures of decapping process

Decapping Process

• Acid Etching Documentation

Software Defined Radio Radiometer

SDR Setup and configuration

• Installing GNURadio and GNURadio Companion
• Setup of the N200 SDR

Testing and Calibration

• Testing the SDR Radiometer
• Testing results from Spring 2014
• Data processing

EE 518 Lab setup

• Setup of the EE 518 Lab
• Lab documentation