Creating Hard Macros: Difference between revisions

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New page: It is possible to create special reusable circuit blocks with the Xilinx tools, called hard macros. Hard macros preserve every aspect of a design, from individual LUT configuration down to...
 
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This guide is based on ISE Webpack 12.2, Windows version.  
This guide is based on ISE Webpack 12.2, Windows version.  


# First have open the project which you want to transform into a hard macro. Open the design in FPGA editor.
# First have open in ISE the project which you want to transform into a hard macro. Open the routed design in FPGA editor by running "View/Edit Routed Design (FPGA Editor)"[[Image:Run_fpga_editor.png]]
 
# Enable logic changes by opening the dialog under File > Main Properties and changing edit mode to Read Write [[Image:Main properties.png]]
 
# Next, unplace each of the pads. Within FPGA Editor take a look at the list "All Components" in the List window (default). Double-click each item in turn to cause the main window to focus on that component. Right click the component and select "unplace" to remove the component and its associated routing. You will want to unplace all the pads, as well as any buffers that are not to be included in the macro. [[Image:Fpga editor pads.png]]
 
# The components that you unplaced are now in the list "Unplaced Components" in the List window. Switch to this list and delete each item by highlighting it and pressing the "Delete" key.
 
# Save this file as a .nmc macro file. Click File > Save As, Selecting Hard Macro as the type. Save the file into the directory of the project for which you intend to instantiate the hard macro [[Image:Fpga editor saveas.png]]
#

Revision as of 06:37, 9 February 2012

It is possible to create special reusable circuit blocks with the Xilinx tools, called hard macros. Hard macros preserve every aspect of a design, from individual LUT configuration down to to the physical routing between components. One can then instantiate this macro in a separate design, and expect that the entity is perfectly replicated on the hardware for each instantiation.

This guide is based on ISE Webpack 12.2, Windows version.

  1. First have open in ISE the project which you want to transform into a hard macro. Open the routed design in FPGA editor by running "View/Edit Routed Design (FPGA Editor)"
  2. Enable logic changes by opening the dialog under File > Main Properties and changing edit mode to Read Write
  3. Next, unplace each of the pads. Within FPGA Editor take a look at the list "All Components" in the List window (default). Double-click each item in turn to cause the main window to focus on that component. Right click the component and select "unplace" to remove the component and its associated routing. You will want to unplace all the pads, as well as any buffers that are not to be included in the macro.
  4. The components that you unplaced are now in the list "Unplaced Components" in the List window. Switch to this list and delete each item by highlighting it and pressing the "Delete" key.
  5. Save this file as a .nmc macro file. Click File > Save As, Selecting Hard Macro as the type. Save the file into the directory of the project for which you intend to instantiate the hard macro