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! Paper Deadline | ! Paper Deadline | ||
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| [http://www.isvlsi.org ISVLSI] | | [http://www.isvlsi.org ISVLSI] | ||
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| Mar 31, 2015 | | Mar 31, 2015 | ||
| May 31, 2015 | | May 31, 2015 | ||
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| [http://www.ieee-hpec.org/cfp.htm HPEC] | |||
| Sep 15-17, 2015 | |||
| Waltham, MA, USA | |||
| May 15, 2015 | |||
| May 15, 2015 | |||
| June 10, 2015 | |||
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=== Possible target conferences === | === Possible target conferences === | ||
* H5-index from [http://scholar.google.com/citations?view_op=top_venues Google Scholar Metrics] | * H5-index from [http://scholar.google.com/citations?view_op=top_venues Google Scholar Metrics] | ||
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| IEEE Int'l Midwest Symposium on Circuits and Systems | | IEEE Int'l Midwest Symposium on Circuits and Systems | ||
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| [http://www.fccm.org FCCM] | |||
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| [http://www.ece.lsu.edu/vaidy/raw RAW] | |||
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| [http://dac.com/submission-categories DAC] | |||
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Revision as of 08:57, 24 January 2015
Welcome to the Reconfigurable Computing wiki.
Upcoming Deadlines
| Conference | Duration | Location | Abstract Deadline | Paper Deadline | Notification |
|---|---|---|---|---|---|
| ISVLSI | Jul 08-10, 2015 | Montpellier, France | Feb 25, 2015 | Feb 25, 2015 | Apr 20, 2015 |
| MWSCAS | Aug 02-05, 2015 | Fort Collins, CO, USA | Mar 09, 2015 | Mar 09, 2015 | Apr 20, 2015 |
| HP3C | Sep 23-25, 2015 | Aizu, Japan | Mar 31, 2015 | Mar 31, 2015 | May 31, 2015 |
| HPEC | Sep 15-17, 2015 | Waltham, MA, USA | May 15, 2015 | May 15, 2015 | June 10, 2015 |
Possible target conferences
- H5-index from Google Scholar Metrics
| Conference | H5-index | H5-Median | Conference Name |
|---|---|---|---|
| IPDPS | 45 | 59 | IEEE Int'l Parallel and Distributed Processing Symposium |
| ARC | 12 | 17 | Int'l Symposium on Applied Reconfigurable Computing |
| ICCD | 18 | 20 | IEEE Int'l Conference on Computer Design |
| ISCA | 53 | 98 | Int'l Symposium on Computer Architecture |
| MWSCAS | 15 | 23 | IEEE Int'l Midwest Symposium on Circuits and Systems |
| FCCM | |||
| RAW | |||
| DAC | |||
| HPDC |
GPGPU Sim
FPGA Design Flow
Xilinx Resources
- Spartan6 CLB Guide
- Spartan6-specific HDL primitives
- Spartan3-specific HDL primitives
- Xilinx Constraints Guide
- How to Use Relationally Placed Macros
Xilinx AXI/AXI-lite Bus Resources
Chipscope
- Using AXI Monitor
- Chipscope AXI Monitor is a wrapper for the Chipscope Logic Analyzer, which itself can be used to monitor arbitrary internal signals in a running system.
Command-line Processing
- Digilent board config tool
- Presents a command line alternative to Adept
- Xilinx Command Line Tools Users Guide
- Any process you run in ISE can also be automated from the command line!
- FPGA_Edline
- Scripted editing can be performed through the command line version of FPGA Editor
FPGA Editor Tasks
Setup file for ISE 14 + Vivado
Convey HC-1/HC-2
FPGA Decapping
Decapped Pictures
- Decapping Pictures
- Wiki Page Containing Pictures of decapping process