Frequently Asked Questions

General FAQ

How to add new verilog files or directories to a PDK project?

By default, the PDK looks like the project/verilog directory and compiles all .v files found there. To add other Verilog directories, use this makefile variable:
USER_VERILOG_DIRS += ../../verilog

Emulator Related

How to read AEG registers in the emulator?

You can use the following function: uint64 AegRead(int aeId, int aegIdx);

How to read/write the memory in the emulator?

You can use the functions AeMemLoad and AeMemStore to read and write from/to the memory as follows:

bool AeMemLoad (int aeId, int mcId, unint64 addr, int size, bool bSigned, uint64 &data);
bool AeMemStore (int aeId, int mcId, unint64 addr, int size, bool bSigned, uint64 &data);

How to run Modelsim GUI while simulating?

You may run the simulation in interactive mode by adding the following line to the makefile in the sim directory:

USER_SIM_OPTIONS = -gui