Team Challenger: Difference between revisions
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::* CUDA Memory Model[https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=7&cad=rja&ved=0CEoQFjAG&url=https%3A%2F%2Fhub.vscse.org%2Fsite%2Fresources%2F2010%2F06%2F00048%2FCUDA_04.pdf&ei=_dwZUY73NKji2gWqo4GYDQ&usg=AFQjCNGgxpCFWYepx6v32fTHNyRI1pOOtA&sig2=6TW0elRmtCKW3i_fAqAT_g&bvm=bv.42261806,d.b2I] | ::* CUDA Memory Model[https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=7&cad=rja&ved=0CEoQFjAG&url=https%3A%2F%2Fhub.vscse.org%2Fsite%2Fresources%2F2010%2F06%2F00048%2FCUDA_04.pdf&ei=_dwZUY73NKji2gWqo4GYDQ&usg=AFQjCNGgxpCFWYepx6v32fTHNyRI1pOOtA&sig2=6TW0elRmtCKW3i_fAqAT_g&bvm=bv.42261806,d.b2I] | ||
::* CUBLAS Library Usage Reference[https://www.docs.nvidia.com/cuda/pdf/CUDA_CUBLAS_Users_Guide.pdf] | ::* CUBLAS Library Usage Reference[https://www.docs.nvidia.com/cuda/pdf/CUDA_CUBLAS_Users_Guide.pdf] | ||
:* week 4 | |||
::* system Verilog tutorial[http://www.asic-world.com/systemverilog/tutorial.html] | |||
Revision as of 15:31, 12 February 2013
Team Members
- Xinying Wang
- Qilin Li
- Zhong Hu
Wiki Contributions
- Xinying Wang
- week 1
- Convey vector personalities offer OpenMP-like programming approach with FPGA accelerating. [1]
- Weekly presentation slides Media:week1slides.pptx
- week 2
- A Sparse Matrix Personality for the Convey HC-1 [2]
- week 3
- Translate verilog version adder file to vhdl code.
- Discuss the implementation of QR application on convey system
- Cordic Algorithm Implementations on FPGA [3]
- Qilin Li
- week 1
- week 2
- week 3
- Zhong Hu