Team Blitz: Difference between revisions
Jump to navigation
Jump to search
Line 19: | Line 19: | ||
*Joy and Rashmi | *Joy and Rashmi | ||
:*Week 1 | |||
Week 2 | ::* [[Media:02-CUDA_basic.pdf | CUDA Basics]] | ||
::* [[Media:Convey_HC-2_Architectual_Overview.pdf | Convey HC-2 Architectural Overview]] | |||
:*Week 2 | |||
::* [[Media:block_diag_vadd.jpg | Vector adder basic block diagram]] | |||
::* [http://numato.com/learning-fpga-and-verilog-a-beginners-guide-part-2-modules Verilog tutorial for beginners] | |||
:*Week 3 | |||
::* [http://www.asic-world.com/verilog/operators.html Verilog operators quick look-up] |
Revision as of 21:13, 5 February 2013
Team Members
- Parth Malkan
- Rashmi Girmal
- Shashank Reddy
- Joy Shukla
- Utkarsh Gupta
Wiki Contributions
- Parth
- Week 1
- Week 2
- Shashank
| Useful video on HC-2 introduction
- Joy and Rashmi