Adding VHDL Files to a Project: Difference between revisions
New page: Here's an e-mail Dr. Jones sent: <nowiki> Here is some information Convey sent me with respect to adding VHDL files to you projects. 1) Probably the easiest option is to use the USER_VH... |
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== Option 1 == | |||
Use the USER_VHDL_FILES variable in the project makefile: | |||
USER_VHDL_FILES += file1.vhd file2.vhd | |||
The PDK makefile automatically compiles your VHDL files for simulation and includes them in the Xilinx project file for synthesis. Note that compile order is important with VHDL, so you should list the files in the appropriate order you want them compiled. | |||
== Option 2 == | |||
Create site and/or user directories that include your own makefile. The PDK automatically searches these directories for a file called "Makefile.cnypdk" and includes that in the default makefile: | |||
CNY_PDK_USER_DIRECTORY | CNY_PDK_USER_DIRECTORY | ||
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This is a good place to set which simulator you use, set up signal tracing, etc. | This is a good place to set which simulator you use, set up signal tracing, etc. | ||
Other information | == Other information == | ||
There are also several variables in the makefile that allow you to create dependencies for your own make flow. For example, the variable USER_SIM_DEPENDENCIES is listed as a dependency for the simulation, so if you want to run your own compile step before running the simulation, you can set that variable and the dependency will cause it to run that step at the right time. Others are USER_COMPILE_DEPENDENCIES and USER_PHYS_DEPENDENCIES, which is a dependency of the synthesis target. | |||
Revision as of 19:09, 25 February 2012
Option 1
Use the USER_VHDL_FILES variable in the project makefile:
USER_VHDL_FILES += file1.vhd file2.vhd
The PDK makefile automatically compiles your VHDL files for simulation and includes them in the Xilinx project file for synthesis. Note that compile order is important with VHDL, so you should list the files in the appropriate order you want them compiled.
Option 2
Create site and/or user directories that include your own makefile. The PDK automatically searches these directories for a file called "Makefile.cnypdk" and includes that in the default makefile:
CNY_PDK_USER_DIRECTORY CNY_PDK_SITE_DIRECTORY
This is a good place to set which simulator you use, set up signal tracing, etc.
Other information
There are also several variables in the makefile that allow you to create dependencies for your own make flow. For example, the variable USER_SIM_DEPENDENCIES is listed as a dependency for the simulation, so if you want to run your own compile step before running the simulation, you can set that variable and the dependency will cause it to run that step at the right time. Others are USER_COMPILE_DEPENDENCIES and USER_PHYS_DEPENDENCIES, which is a dependency of the synthesis target.