Team Blitz: Difference between revisions
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New page: == Team Members == * Parth Malkan * Rashmi Girmal * Shashank Reddy * Joy Shukla |
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[[Image:Blitz.jpg|200px|thumb|right]] | |||
== Team Members == | == Team Members == | ||
* Parth Malkan | * Parth Malkan | ||
* Rashmi Girmal | * Rashmi Girmal | ||
* Joy Shukla | * Joy Shukla | ||
* Utkarsh Gupta | |||
==Velvet Genome Assembly Algorithm== | |||
*Velvet Algorithm | |||
:*[[Media:Velvet_Bruijn_graphs_2008.pdf | Reference Paper]] | |||
:*[[Media:velvet_poster.pdf | Poster]] | |||
:*[[Media:Blitz_week8.pdf | Presentation]] | |||
:*[[Media:1015333.pdf | Velvet Implementation on Convey]] | |||
*Links to Velvet Material | |||
:*[http://genome.cshlp.org/content/18/5/821.long Journal Article] | |||
:*[http://www.ebi.ac.uk/~zerbino/velvet/ Latest Version of Velvet software available for download] | |||
*Parallelizing Velvet Algorithm | |||
:*[[Media:1569511963.pdf | Reference Paper]] | |||
:*[[Media:Blitz_week9.pdf | Presentation]] | |||
== Wiki Contributions == | |||
*Parth | |||
:*Week 1 | |||
::* [[Media:Unix Commands.pdf | Useful Unix Commands]] | |||
:*Week 2 | |||
::* [[Media:Dos to Unix.pdf | Dos to Unix translation]] | |||
*Shashank | |||
[http://www.youtube.com/watch?v=AGgkpaBHS78 | Useful video on HC-2 introduction] | |||
*Joy and Rashmi | |||
:*Week 1 | |||
::* [[Media:02-CUDA_basic.pdf | CUDA Basics]] | |||
::* [[Media:Convey_HC-2_Architectual_Overview.pdf | Convey HC-2 Architectural Overview]] | |||
:*Week 2 | |||
::* [[Media:block_diag_vadd.jpg | Vector adder basic block diagram]] | |||
::* [http://numato.com/learning-fpga-and-verilog-a-beginners-guide-part-2-modules Verilog tutorial for beginners] | |||
:*Week 3 | |||
::* [[Media:ConveyTutorial1_modified.pdf | Updated Convey PDK Tutorial]] | |||
::* [http://www.asic-world.com/verilog/verilog_one_day.html Verilog in one day] | |||
:*Week 5 | |||
::* [[Media:mc_array10.jpg | FSM for reading an array from memory given the address of the array]] | |||
*Utkarsh | |||
:*Week 1 | |||
::* [[Media:High-Performance Heterogeneous Computing with the Convey HC-1.pdf | High Performance Heterogeneous Computing with the Convey HC-1]] | |||
::* [[Media:Iowa-State-University-2012-MemoCODE-Conference-design-contest-exact-match-short-read-aligner.pdf | Iowa State University 2012 MemoCODE]] | |||
:*Week 2 | |||
::* [[Media:01-LanguageWhitePaper.pdf | Difference between VHDL, Verilog and SystemVerilog]] | |||
:*Week 6 | |||
::* [[Media:PR_Broad.pdf | Convey HC in Genome Sequencing]] | |||
:*Week 10 | |||
::* [[Media:Nelson_T_0_0_2000_Implementa.pdf | IMPLEMENTATION OF IMAGE PROCESSING ALGORITHMS ON FPGA HARDWARE]] |
Latest revision as of 07:23, 12 May 2013
Team Members
- Parth Malkan
- Rashmi Girmal
- Joy Shukla
- Utkarsh Gupta
Velvet Genome Assembly Algorithm
- Velvet Algorithm
- Links to Velvet Material
- Parallelizing Velvet Algorithm
Wiki Contributions
- Parth
- Week 1
- Week 2
- Shashank
| Useful video on HC-2 introduction
- Joy and Rashmi
- Week 1
- Week 2
- Week 3
- Week 5
- Utkarsh