<?xml version="1.0"?>
<feed xmlns="http://www.w3.org/2005/Atom" xml:lang="en">
	<id>https://wikis.ece.iastate.edu/cpre584/api.php?action=feedcontributions&amp;feedformat=atom&amp;user=Carterp</id>
	<title>Cpre584 - User contributions [en]</title>
	<link rel="self" type="application/atom+xml" href="https://wikis.ece.iastate.edu/cpre584/api.php?action=feedcontributions&amp;feedformat=atom&amp;user=Carterp"/>
	<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Special:Contributions/Carterp"/>
	<updated>2026-07-19T09:10:24Z</updated>
	<subtitle>User contributions</subtitle>
	<generator>MediaWiki 1.42.1</generator>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Challenger&amp;diff=908</id>
		<title>Team Challenger</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Challenger&amp;diff=908"/>
		<updated>2013-03-12T23:23:32Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* References */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Team Members ==&lt;br /&gt;
&lt;br /&gt;
* Xinying Wang&lt;br /&gt;
* Qilin Li&lt;br /&gt;
* Zhong Hu&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;br /&gt;
* [http://i.cs.hku.hk/~alse/hkubrg/projects/idba/ IDBA - A Practical Iterative de Bruijn Graph De Novo Assembler]&lt;br /&gt;
&lt;br /&gt;
== Wiki Contributions ==&lt;br /&gt;
&lt;br /&gt;
* Xinying Wang&lt;br /&gt;
:*  week 1&lt;br /&gt;
::*  Convey vector personalities offer OpenMP-like programming approach with FPGA accelerating. [http://www.fpl2012.org/Presentations/W4B2.pdf]&lt;br /&gt;
::*  Weekly presentation slides [[Media:week1slides.pptx]]&lt;br /&gt;
:*  week 2&lt;br /&gt;
::*  A Sparse Matrix Personality for the Convey HC-1 [http://ieeexplore.ieee.org/xpl/login.jsp?tp=&amp;amp;arnumber=5771239&amp;amp;url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D5771239]&lt;br /&gt;
:*  week 3&lt;br /&gt;
::* Translate verilog version adder file to vhdl code.&lt;br /&gt;
::* Discuss the implementation of QR application on convey system&lt;br /&gt;
::* Cordic Algorithm Implementations on FPGA [http://cutler.eecs.berkeley.edu/classes/ee225c/Papers/cordic.pdf]&lt;br /&gt;
:*  week 4&lt;br /&gt;
::* Convey computing with bioinformatics applications [http://hpcsociety.org/Resources/Documents/121212Kirby-CONVEY-SHPCP_121212.pdf]&lt;br /&gt;
:*  week 5&lt;br /&gt;
::* Tutorial for COREGEN [http://homepages.cae.wisc.edu/~ece554/website/Xilinx/Coregen_user_guide.pdf]&lt;br /&gt;
* Qilin Li&lt;br /&gt;
:*  week 1&lt;br /&gt;
::*  Introduction to Compilers for Convey [http://www.conveycomputer.com/files/3913/5085/4426/Compiler_Data_Sheet.pdf]&lt;br /&gt;
::*  GPGPU Programming on example of CUDA [http://panoramix.ift.uni.wroc.pl/~maq/cuda/prezentacja-cuda-eng.pdf]&lt;br /&gt;
::*  Parallel Programming in CUDA C [http://developer.download.nvidia.com/books/cuda-by-example/cuda-by-example-sample.pdf]&lt;br /&gt;
:*  week 2&lt;br /&gt;
::*  [http://www.cs.colby.edu/maxwell/courses/tutorials/maketutor/ A Simple Makefile Tutorial]&lt;br /&gt;
:*  week 3&lt;br /&gt;
::*  [http://newbiedoc.sourceforge.net/text_editing/vim.html#MODES-CL A Simple VIM Tutorial]&lt;br /&gt;
:*  week 4&lt;br /&gt;
::* [[Media:ConveySystemAdministrationGuide.pdf | Convey System Administration Guide]]&lt;br /&gt;
* Zhong Hu&lt;br /&gt;
::*  CUDA Global Memory Usage &amp;amp; Strategy. [http://developer.download.nvidia.com/CUDA/training/cuda_webinars_GlobalMemory.pdf]&lt;br /&gt;
::*  CUDA C++ code samples.[http://docs.nvidia.com/cuda/cuda-samples/index.html]&lt;br /&gt;
:* make-up for week 2&lt;br /&gt;
::* QR ecomposition on GPUs[http://dl.acm.org/citation.cfm?id=1513904]&lt;br /&gt;
::* Introduction to Householder algorithm in QR decomposition application[http://math.fullerton.edu/mathews/n2003/householdermod.html]&lt;br /&gt;
:* make-up for week 3&lt;br /&gt;
::* CUDA Memory Model[https://www.google.com/url?sa=t&amp;amp;rct=j&amp;amp;q=&amp;amp;esrc=s&amp;amp;source=web&amp;amp;cd=7&amp;amp;cad=rja&amp;amp;ved=0CEoQFjAG&amp;amp;url=https%3A%2F%2Fhub.vscse.org%2Fsite%2Fresources%2F2010%2F06%2F00048%2FCUDA_04.pdf&amp;amp;ei=_dwZUY73NKji2gWqo4GYDQ&amp;amp;usg=AFQjCNGgxpCFWYepx6v32fTHNyRI1pOOtA&amp;amp;sig2=6TW0elRmtCKW3i_fAqAT_g&amp;amp;bvm=bv.42261806,d.b2I]&lt;br /&gt;
::* CUBLAS Library Usage Reference[https://www.docs.nvidia.com/cuda/pdf/CUDA_CUBLAS_Users_Guide.pdf]&lt;br /&gt;
:* week 4&lt;br /&gt;
::* system Verilog tutorial[http://www.asic-world.com/systemverilog/tutorial.html]&lt;br /&gt;
:* week 5&lt;br /&gt;
::* most commonly used CUDA wiki website[https://developer.nvidia.com/category/zone/cuda-zone]&lt;br /&gt;
::* Nvidia GPU versions and corresponding compute capability[http://en.wikipedia.org/wiki/CUDA#Version_features_and_specifications]&lt;br /&gt;
::* methods to check CUDA memory constraints in terms of different GPU versions[http://3dgep.com/?p=1913]&lt;br /&gt;
:* week 6&lt;br /&gt;
::* open source software lists for genome alignment and assembly[http://seqanswers.com/wiki/Software/list].&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Challenger&amp;diff=907</id>
		<title>Team Challenger</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Challenger&amp;diff=907"/>
		<updated>2013-03-12T23:21:39Z</updated>

		<summary type="html">&lt;p&gt;Carterp: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Team Members ==&lt;br /&gt;
&lt;br /&gt;
* Xinying Wang&lt;br /&gt;
* Qilin Li&lt;br /&gt;
* Zhong Hu&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Wiki Contributions ==&lt;br /&gt;
&lt;br /&gt;
* Xinying Wang&lt;br /&gt;
:*  week 1&lt;br /&gt;
::*  Convey vector personalities offer OpenMP-like programming approach with FPGA accelerating. [http://www.fpl2012.org/Presentations/W4B2.pdf]&lt;br /&gt;
::*  Weekly presentation slides [[Media:week1slides.pptx]]&lt;br /&gt;
:*  week 2&lt;br /&gt;
::*  A Sparse Matrix Personality for the Convey HC-1 [http://ieeexplore.ieee.org/xpl/login.jsp?tp=&amp;amp;arnumber=5771239&amp;amp;url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D5771239]&lt;br /&gt;
:*  week 3&lt;br /&gt;
::* Translate verilog version adder file to vhdl code.&lt;br /&gt;
::* Discuss the implementation of QR application on convey system&lt;br /&gt;
::* Cordic Algorithm Implementations on FPGA [http://cutler.eecs.berkeley.edu/classes/ee225c/Papers/cordic.pdf]&lt;br /&gt;
:*  week 4&lt;br /&gt;
::* Convey computing with bioinformatics applications [http://hpcsociety.org/Resources/Documents/121212Kirby-CONVEY-SHPCP_121212.pdf]&lt;br /&gt;
:*  week 5&lt;br /&gt;
::* Tutorial for COREGEN [http://homepages.cae.wisc.edu/~ece554/website/Xilinx/Coregen_user_guide.pdf]&lt;br /&gt;
* Qilin Li&lt;br /&gt;
:*  week 1&lt;br /&gt;
::*  Introduction to Compilers for Convey [http://www.conveycomputer.com/files/3913/5085/4426/Compiler_Data_Sheet.pdf]&lt;br /&gt;
::*  GPGPU Programming on example of CUDA [http://panoramix.ift.uni.wroc.pl/~maq/cuda/prezentacja-cuda-eng.pdf]&lt;br /&gt;
::*  Parallel Programming in CUDA C [http://developer.download.nvidia.com/books/cuda-by-example/cuda-by-example-sample.pdf]&lt;br /&gt;
:*  week 2&lt;br /&gt;
::*  [http://www.cs.colby.edu/maxwell/courses/tutorials/maketutor/ A Simple Makefile Tutorial]&lt;br /&gt;
:*  week 3&lt;br /&gt;
::*  [http://newbiedoc.sourceforge.net/text_editing/vim.html#MODES-CL A Simple VIM Tutorial]&lt;br /&gt;
:*  week 4&lt;br /&gt;
::* [[Media:ConveySystemAdministrationGuide.pdf | Convey System Administration Guide]]&lt;br /&gt;
* Zhong Hu&lt;br /&gt;
::*  CUDA Global Memory Usage &amp;amp; Strategy. [http://developer.download.nvidia.com/CUDA/training/cuda_webinars_GlobalMemory.pdf]&lt;br /&gt;
::*  CUDA C++ code samples.[http://docs.nvidia.com/cuda/cuda-samples/index.html]&lt;br /&gt;
:* make-up for week 2&lt;br /&gt;
::* QR ecomposition on GPUs[http://dl.acm.org/citation.cfm?id=1513904]&lt;br /&gt;
::* Introduction to Householder algorithm in QR decomposition application[http://math.fullerton.edu/mathews/n2003/householdermod.html]&lt;br /&gt;
:* make-up for week 3&lt;br /&gt;
::* CUDA Memory Model[https://www.google.com/url?sa=t&amp;amp;rct=j&amp;amp;q=&amp;amp;esrc=s&amp;amp;source=web&amp;amp;cd=7&amp;amp;cad=rja&amp;amp;ved=0CEoQFjAG&amp;amp;url=https%3A%2F%2Fhub.vscse.org%2Fsite%2Fresources%2F2010%2F06%2F00048%2FCUDA_04.pdf&amp;amp;ei=_dwZUY73NKji2gWqo4GYDQ&amp;amp;usg=AFQjCNGgxpCFWYepx6v32fTHNyRI1pOOtA&amp;amp;sig2=6TW0elRmtCKW3i_fAqAT_g&amp;amp;bvm=bv.42261806,d.b2I]&lt;br /&gt;
::* CUBLAS Library Usage Reference[https://www.docs.nvidia.com/cuda/pdf/CUDA_CUBLAS_Users_Guide.pdf]&lt;br /&gt;
:* week 4&lt;br /&gt;
::* system Verilog tutorial[http://www.asic-world.com/systemverilog/tutorial.html]&lt;br /&gt;
:* week 5&lt;br /&gt;
::* most commonly used CUDA wiki website[https://developer.nvidia.com/category/zone/cuda-zone]&lt;br /&gt;
::* Nvidia GPU versions and corresponding compute capability[http://en.wikipedia.org/wiki/CUDA#Version_features_and_specifications]&lt;br /&gt;
::* methods to check CUDA memory constraints in terms of different GPU versions[http://3dgep.com/?p=1913]&lt;br /&gt;
:* week 6&lt;br /&gt;
::* open source software lists for genome alignment and assembly[http://seqanswers.com/wiki/Software/list].&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=870</id>
		<title>Team Cyc05</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=870"/>
		<updated>2013-02-12T22:03:47Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* PengQing */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{| border=&amp;quot;1&amp;quot; cellpadding=&amp;quot;5&amp;quot; cellspacing=&amp;quot;0&amp;quot; align=&amp;quot;right&amp;quot;&lt;br /&gt;
|+&#039;&#039;&#039;Team Cyc05&#039;&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| align=&amp;quot;center&amp;quot; width=&amp;quot;200px&amp;quot; | [[Image:Cy.jpg]]&lt;br /&gt;
|-&lt;br /&gt;
! style=&amp;quot;background:#CD1014;&amp;quot; | Cyc05 Team Logo&lt;br /&gt;
|-&lt;br /&gt;
|-&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; align=&amp;quot;center&amp;quot; |&lt;br /&gt;
{| border=&amp;quot;0&amp;quot; &lt;br /&gt;
|+&#039;&#039;Team Members&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| Osama G. Attia (ogamal)&lt;br /&gt;
|-&lt;br /&gt;
| Tyler Johnson (tyler07)&lt;br /&gt;
|-&lt;br /&gt;
| PengQing Xie (carterp)&lt;br /&gt;
|}&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Team Members ==&lt;br /&gt;
* Osama G. Attia&lt;br /&gt;
* Tyler Johnson&lt;br /&gt;
* PengQing Xie&lt;br /&gt;
&lt;br /&gt;
== Weekly Presentations ==&lt;br /&gt;
*Week 1 - [[Media:Cyc05_-_Presentation_01.pdf | Presentation Slides Week 1]]&lt;br /&gt;
*Week 2 - [[Media:Cyc05_Week_2.pdf | Presentation Slides Week 2]]&lt;br /&gt;
*Week 3 - [[Media:Cyc05_week3_presentation.pdf‎ | Presentation Slides Week 3]]&lt;br /&gt;
&lt;br /&gt;
== Wiki Contributions ==&lt;br /&gt;
=== Tyler ===&lt;br /&gt;
*Week 1&lt;br /&gt;
**[[Useful Modelsim Commands]]&lt;br /&gt;
**[[Media:Modelsim_pe_user_10.0d.pdf | Modelsim Users Guide]]&lt;br /&gt;
*Week2&lt;br /&gt;
** [[Media:Connect_Remotely_Via_VPN.pdf | Guide to Remote Connecting]]&lt;br /&gt;
*Week3&lt;br /&gt;
**[[Adding VHDL Files to a Project]] Additions and alterations&lt;br /&gt;
**Hosted the scripts for Kevinss tutorial and provided a link for it&lt;br /&gt;
**Modified the landing page to Kevni&#039;t tutorial to have the pdf, and a link to the scripts&lt;br /&gt;
**Modified [[Tutorial: Creating a Custom Bitfile]], some details were unclear and/or left out about using your newly built bitfile&lt;br /&gt;
&lt;br /&gt;
=== Osama ===&lt;br /&gt;
*Week 1: Creating Team Cyc05 page.&lt;br /&gt;
*Week 2:&lt;br /&gt;
**Updating [[Connecting to convey-1.ece.iastate.edu]] with usage policy&lt;br /&gt;
**Adding [[Frequently Asked Questions]] page&lt;br /&gt;
* Week 3:&lt;br /&gt;
**Updating the [[Frequently Asked Questions]] page&lt;br /&gt;
**Adding and maintaining the [[Using the Memory Controller Interface]] page&lt;br /&gt;
* Week 4:&lt;br /&gt;
**[[Media:Vhd2v isnt.txt|Python script to generate instantiation code of VHDL module in Verilog]]&lt;br /&gt;
**[[Media:Convey_mc_ports.txt|Python script to generate the MC interface signals in VHDL]]&lt;br /&gt;
**[[Media:convey_mc_ports_vhdl.txt|MC interface signals]] in VHDL&lt;br /&gt;
**Adding more stuff to the [[Frequently Asked Questions]] page&lt;br /&gt;
&lt;br /&gt;
=== PengQing ===&lt;br /&gt;
*Week 1:&lt;br /&gt;
**[http://sn0v.wordpress.com/2012/12/07/installing-cuda-5-on-ubuntu-12-04/ Installing CUDA on Ubuntu]&lt;br /&gt;
**[http://graphics.stanford.edu/~mhouston/public_talks/R520-mhouston.pdf General Purpose Computation on GPUs (GPGPU)]&lt;br /&gt;
*Week 2:&lt;br /&gt;
**[http://vol.verilog.com/VOL/main.htm Verilog self-study online course]&lt;br /&gt;
*Week 3:&lt;br /&gt;
**[http://www.ece.msstate.edu/~reese/EE4743/lectures/verilog_intro_2002/verilog_intro_2002.pdf Verilog vs. VHDL]&lt;br /&gt;
*Week 4:&lt;br /&gt;
**[http://www.vogella.com/articles/Git/article.html git tutorial]&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=869</id>
		<title>Team Cyc05</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=869"/>
		<updated>2013-02-12T21:35:49Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* PengQing */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{| border=&amp;quot;1&amp;quot; cellpadding=&amp;quot;5&amp;quot; cellspacing=&amp;quot;0&amp;quot; align=&amp;quot;right&amp;quot;&lt;br /&gt;
|+&#039;&#039;&#039;Team Cyc05&#039;&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| align=&amp;quot;center&amp;quot; width=&amp;quot;200px&amp;quot; | [[Image:Cy.jpg]]&lt;br /&gt;
|-&lt;br /&gt;
! style=&amp;quot;background:#CD1014;&amp;quot; | Cyc05 Team Logo&lt;br /&gt;
|-&lt;br /&gt;
|-&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; align=&amp;quot;center&amp;quot; |&lt;br /&gt;
{| border=&amp;quot;0&amp;quot; &lt;br /&gt;
|+&#039;&#039;Team Members&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| Osama G. Attia (ogamal)&lt;br /&gt;
|-&lt;br /&gt;
| Tyler Johnson (tyler07)&lt;br /&gt;
|-&lt;br /&gt;
| PengQing Xie (carterp)&lt;br /&gt;
|}&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Team Members ==&lt;br /&gt;
* Osama G. Attia&lt;br /&gt;
* Tyler Johnson&lt;br /&gt;
* PengQing Xie&lt;br /&gt;
&lt;br /&gt;
== Weekly Presentations ==&lt;br /&gt;
*Week 1 - [[Media:Cyc05_-_Presentation_01.pdf | Presentation Slides Week 1]]&lt;br /&gt;
*Week 2 - [[Media:Cyc05_Week_2.pdf | Presentation Slides Week 2]]&lt;br /&gt;
*Week 3 - [[Media:Cyc05_week3_presentation.pdf‎ | Presentation Slides Week 3]]&lt;br /&gt;
&lt;br /&gt;
== Wiki Contributions ==&lt;br /&gt;
=== Tyler ===&lt;br /&gt;
*Week 1&lt;br /&gt;
**[[Useful Modelsim Commands]]&lt;br /&gt;
**[[Media:Modelsim_pe_user_10.0d.pdf | Modelsim Users Guide]]&lt;br /&gt;
*Week2&lt;br /&gt;
** [[Media:Connect_Remotely_Via_VPN.pdf | Guide to Remote Connecting]]&lt;br /&gt;
*Week3&lt;br /&gt;
**[[Adding VHDL Files to a Project]] Additions and alterations&lt;br /&gt;
**Hosted the scripts for Kevinss tutorial and provided a link for it&lt;br /&gt;
**Modified the landing page to Kevni&#039;t tutorial to have the pdf, and a link to the scripts&lt;br /&gt;
**Modified [[Tutorial: Creating a Custom Bitfile]], some details were unclear and/or left out about using your newly built bitfile&lt;br /&gt;
&lt;br /&gt;
=== Osama ===&lt;br /&gt;
*Week 1: Creating Team Cyc05 page.&lt;br /&gt;
*Week 2:&lt;br /&gt;
**Updating [[Connecting to convey-1.ece.iastate.edu]] with usage policy&lt;br /&gt;
**Adding [[Frequently Asked Questions]] page&lt;br /&gt;
* Week 3:&lt;br /&gt;
**Updating the [[Frequently Asked Questions]] page&lt;br /&gt;
**Adding and maintaining the [[Using the Memory Controller Interface]] page&lt;br /&gt;
* Week 4:&lt;br /&gt;
**[[Media:Vhd2v isnt.txt|Python script to generate instantiation code of VHDL module in Verilog]]&lt;br /&gt;
**[[Media:Convey_mc_ports.txt|Python script to generate the MC interface signals in VHDL]]&lt;br /&gt;
**[[Media:convey_mc_ports_vhdl.txt|MC interface signals]] in VHDL&lt;br /&gt;
**Adding more stuff to the [[Frequently Asked Questions]] page&lt;br /&gt;
&lt;br /&gt;
=== PengQing ===&lt;br /&gt;
*Week 1:&lt;br /&gt;
**[http://sn0v.wordpress.com/2012/12/07/installing-cuda-5-on-ubuntu-12-04/ Installing CUDA on Ubuntu]&lt;br /&gt;
**[http://graphics.stanford.edu/~mhouston/public_talks/R520-mhouston.pdf General Purpose Computation on GPUs (GPGPU)]&lt;br /&gt;
*Week 2:&lt;br /&gt;
**[http://vol.verilog.com/VOL/main.htm Verilog self-study online course]&lt;br /&gt;
*Week 3:&lt;br /&gt;
**[http://www.ece.msstate.edu/~reese/EE4743/lectures/verilog_intro_2002/verilog_intro_2002.pdf Verilog vs. VHDL]&lt;br /&gt;
*Week 4:&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Main_Page&amp;diff=840</id>
		<title>Main Page</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Main_Page&amp;diff=840"/>
		<updated>2013-02-06T23:15:53Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* Helpful Guides */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Articles ==&lt;br /&gt;
=== Convey HC-1 Tutorials ===&lt;br /&gt;
* [[Connecting to convey-1.ece.iastate.edu]]&lt;br /&gt;
* [[Convey environment setup|Setting Up Environment Variables on Convey&#039;s HC-1]]&lt;br /&gt;
* [[Convey PDK Tutorial]]&lt;br /&gt;
* [[Using the Memory Controller Interface]]&lt;br /&gt;
* [[Running the Vector Adder Example Application]]&lt;br /&gt;
&amp;lt;!-- * Convey pdk tutorial: [[image:ConveyTutorial1.pdf]] (uses newCnyProject script) --&amp;gt;&lt;br /&gt;
* [[Analyze the Simpleton Basic App]]&lt;br /&gt;
* [[Tutorial: Creating a Custom Bitfile | Create a Custom Bitfile]]&lt;br /&gt;
* [[Using a Custom Bitfile in C Code]]&lt;br /&gt;
* [[Adding VHDL Files to a Project]]&lt;br /&gt;
* [[The Verilog Hardware Interface for CAE]]&lt;br /&gt;
* [[Using ISE&#039;s Core Generator to build FIFOs and other IP cores]]&lt;br /&gt;
* [[Running Different Bitfiles on each AE | Projects with Multiple Bitfiles]]&lt;br /&gt;
* [[Using the Write-Complete Interface]]&lt;br /&gt;
* [[Using the Timing Analyzer]]&lt;br /&gt;
&lt;br /&gt;
* [[Using SPAT]]&lt;br /&gt;
* [[Using GPROF]]&lt;br /&gt;
* [[Convey vector example | Example of Loop Unrolling using FPGA]]&lt;br /&gt;
* [[Sobel Algorithm | Speeding up Sobel Algorithm]]&lt;br /&gt;
* [[Frequently Asked Questions]]&lt;br /&gt;
&lt;br /&gt;
== Reference Manuals ==&lt;br /&gt;
=== Convey ===&lt;br /&gt;
* [[Media:ConveyPDKReferenceManual.pdf | Convey PDK Reference Manual (.pdf)]] (updated to V5.2; April 2012)&lt;br /&gt;
* [[Media:ConveyProgrammersGuide.pdf | Convey Programmers Guide (.pdf)]] (updated to V1.8; November 2010)&lt;br /&gt;
* [[Media:ConveyReferenceManual.pdf | Convey Reference Manual (.pdf)]]&lt;br /&gt;
* [[Media:ConveySpatUsersGuide.pdf | Convey SPAT (Simulator Performance Analysis Tool) Guide]]&lt;br /&gt;
* [[Media:Convey PDK Training.pdf | Convey PDK (.pdf)]]&lt;br /&gt;
* [[Media:Convey Overview.pdf | Convey Overview (.pdf)]]&lt;br /&gt;
&lt;br /&gt;
The newet version of these documents are available at [http://www.conveysupport.com/help/?page_id=112 Convey&#039;s Support Site]&lt;br /&gt;
&lt;br /&gt;
=== CUDA ===&lt;br /&gt;
* [[Media:CUDA_C_Programming_Guide.pdf | CUDA_C_Programming_Guide (.pdf)]]&lt;br /&gt;
* [[Media:CUDA_C_Best_Practices_Guide.pdf | CUDA_C_Best_Practices_Guide(.pdf)]]&lt;br /&gt;
* [[Media:CUDA_Memory.pdf | CUDA_Memory (.pdf)]]&lt;br /&gt;
&lt;br /&gt;
==Links==&lt;br /&gt;
* [http://www.asic-world.com www.asic-world.com] - Great Tutorials for those Learning HDLs&lt;br /&gt;
* [http://memocode.irisa.fr MemoCODE 2012]&lt;br /&gt;
** [[Media:2012-memocode-contest.pdf | MemoCODE Contest.pdf]]&lt;br /&gt;
** [http://memocode.irisa.fr/2012/2012-memocode-contest.tar.gz Reference Implementation]&lt;br /&gt;
** [ftp://ftp-trace.ncbi.nih.gov/1000genomes/ftp/technical/reference/human_g1k_v37.fasta.gz Human Reference Genome (human_g1k_v37.fasta.gz)]&lt;br /&gt;
** [ftp://ftp-trace.ncbi.nih.gov/1000genomes/ftp/data/NA06985/sequence_read/ERR050082.filt.fastq.gz Example Reads (ERR050082.filt.fastq.gz)]&lt;br /&gt;
** [http://ftp.1000genomes.ebi.ac.uk/vol1/ftp/data/NA06985/sequence_read/ERR050082.filt.fastq.gz Example Reads (Alternative Link) (ERR050082.filt.fastq.gz)]&lt;br /&gt;
&lt;br /&gt;
* [[2010 Main Page | CprE 584 2010 Wiki Main Page]]&lt;br /&gt;
* [http://class.ee.iastate.edu/cpre583/ CprE 583 Website]&lt;br /&gt;
* [http://class.ece.iastate.edu/cpre584/ CprE 584 Website]&lt;br /&gt;
&lt;br /&gt;
=== Other Articles ===&lt;br /&gt;
* [[Assignment|Assignments]]&lt;br /&gt;
* [[A quick start on CUDA]]&lt;br /&gt;
&lt;br /&gt;
== Helpful Guides ==&lt;br /&gt;
* [http://www.c7t-hdl.com/Docs/C7T_AN05_Customized_WaveView_ModelSim_ISE.pdf Modelsim and ISE]&lt;br /&gt;
* [http://www.fpga.com.cn/hdl/training/verilog%20reference%20guide.pdf The Verilog Golden Reference]&lt;br /&gt;
* [http://courseware.ee.calpoly.edu/~bmealy/shock_awe_vhdl_adobe.pdf &amp;quot;The Shock and Awe&amp;quot; VHDL Tutorial]&lt;br /&gt;
* [http://www.ece.msstate.edu/~reese/EE4743/lectures/verilog_intro_2002/verilog_intro_2002.pdf Verilog vs. VHDL]&lt;br /&gt;
* [http://esd.cs.ucr.edu/labs/tutorial/ VHDL Simple Code Examples]&lt;br /&gt;
* [http://www.seas.upenn.edu/~ese171/vhdl/vhdl_primer.html VHDL Primer]&lt;br /&gt;
* [http://www.kxcad.net/electronic_Xilinx_guide/mergedProjects/xsim/html/xs_p_ml_instantiation.htm Using VHDL components in Verilog]&lt;br /&gt;
* [[Media:Modelsim_pe_user_10.0d.pdf | Modelsim Users Guide]]&lt;br /&gt;
* [[Useful Modelsim Commands]]&lt;br /&gt;
* [http://sn0v.wordpress.com/2012/12/07/installing-cuda-5-on-ubuntu-12-04/ Installing CUDA on Ubuntu]&lt;br /&gt;
* [http://graphics.stanford.edu/~mhouston/public_talks/R520-mhouston.pdf General Purpose Computation on GPUs (GPGPU)]&lt;br /&gt;
*  Convey vector personalities offer OpenMP-like programming approach with FPGA accelerating. [http://www.fpl2012.org/Presentations/W4B2.pdf]&lt;br /&gt;
* [[Media:Connect_Remotely_Via_VPN.pdf | Guide to Remote Connecting]]&lt;br /&gt;
&lt;br /&gt;
== Readings for Memocode 2012 ==&lt;br /&gt;
*[[Media:Brief_Bioinform-2010-Li-473-83.pdf|A survey on algorithms for sequencing]]&lt;br /&gt;
*[[Media:Gb-2009-10-3-r25.pdf|Burrows-Wheeler indexing]]&lt;br /&gt;
&lt;br /&gt;
== Spring 2012 Teams ==&lt;br /&gt;
* [[Team Gryffindor]]&lt;br /&gt;
* [[Team Slytherin]]&lt;br /&gt;
* [[Team 142857]]&lt;br /&gt;
== Spring 2013 Teams ==&lt;br /&gt;
* [[Team Cyc05]]&lt;br /&gt;
* [[Team Challenger]]&lt;br /&gt;
* [[Team Blitz]]&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=839</id>
		<title>Team Cyc05</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=839"/>
		<updated>2013-02-06T23:13:22Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* PengQing */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{| border=&amp;quot;1&amp;quot; cellpadding=&amp;quot;5&amp;quot; cellspacing=&amp;quot;0&amp;quot; align=&amp;quot;right&amp;quot;&lt;br /&gt;
|+&#039;&#039;&#039;Team Cyc05&#039;&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| align=&amp;quot;center&amp;quot; width=&amp;quot;200px&amp;quot; | [[Image:Cy.jpg]]&lt;br /&gt;
|-&lt;br /&gt;
! style=&amp;quot;background:#CD1014;&amp;quot; | Cyc05 Team Logo&lt;br /&gt;
|-&lt;br /&gt;
|-&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; align=&amp;quot;center&amp;quot; |&lt;br /&gt;
{| border=&amp;quot;0&amp;quot; &lt;br /&gt;
|+&#039;&#039;Team Members&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| Osama G. Attia (ogamal)&lt;br /&gt;
|-&lt;br /&gt;
| Tyler Johnson (tyler07)&lt;br /&gt;
|-&lt;br /&gt;
| PengQing Xie (carterp)&lt;br /&gt;
|}&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Team Members ==&lt;br /&gt;
* Osama G. Attia&lt;br /&gt;
* Tyler Johnson&lt;br /&gt;
* PengQing Xie&lt;br /&gt;
&lt;br /&gt;
== Weekly Presentations ==&lt;br /&gt;
*Week 1 - [[Media:Cyc05_-_Presentation_01.pdf | Presentation Slides Week 1]]&lt;br /&gt;
*Week 2 - [[Media:Cyc05_Week_2.pdf | Presentation Slides Week 2]]&lt;br /&gt;
*Week 3 - [[Media:Cyc05_week3_presentation.pdf‎ | Presentation Slides Week 3]]&lt;br /&gt;
&lt;br /&gt;
== Wiki Contributions ==&lt;br /&gt;
=== Tyler ===&lt;br /&gt;
*Week 1&lt;br /&gt;
**[[Useful Modelsim Commands]]&lt;br /&gt;
**[[Media:Modelsim_pe_user_10.0d.pdf | Modelsim Users Guide]]&lt;br /&gt;
*Week2&lt;br /&gt;
** [[Media:Connect_Remotely_Via_VPN.pdf | Guide to Remote Connecting]]&lt;br /&gt;
*Week3&lt;br /&gt;
**[[Adding VHDL Files to a Project]] Additions and alterations&lt;br /&gt;
**Hosted the scripts for Kevinss tutorial and provided a link for it&lt;br /&gt;
**Modified the landing page to Kevni&#039;t tutorial to have the pdf, and a link to the scripts&lt;br /&gt;
**Modified [[Tutorial: Creating a Custom Bitfile]], some details were unclear and/or left out about using your newly built bitfile&lt;br /&gt;
&lt;br /&gt;
=== Osama ===&lt;br /&gt;
*Week 1: Creating Team Cyc05 page.&lt;br /&gt;
*Week 2:&lt;br /&gt;
**Updating [[Connecting to convey-1.ece.iastate.edu]] with usage policy.&lt;br /&gt;
**Adding [[Frequently Asked Questions]] page.&lt;br /&gt;
* Week 3:&lt;br /&gt;
**Updating the [[Frequently Asked Questions]] page.&lt;br /&gt;
**Adding and maintaining the [[Using the Memory Controller Interface]] page.&lt;br /&gt;
&lt;br /&gt;
=== PengQing ===&lt;br /&gt;
*Week 1:&lt;br /&gt;
**[http://sn0v.wordpress.com/2012/12/07/installing-cuda-5-on-ubuntu-12-04/ Installing CUDA on Ubuntu]&lt;br /&gt;
**[http://graphics.stanford.edu/~mhouston/public_talks/R520-mhouston.pdf General Purpose Computation on GPUs (GPGPU)]&lt;br /&gt;
*Week 2:&lt;br /&gt;
**[http://vol.verilog.com/VOL/main.htm Verilog self-study online course]&lt;br /&gt;
*Week 3:&lt;br /&gt;
**[http://www.ece.msstate.edu/~reese/EE4743/lectures/verilog_intro_2002/verilog_intro_2002.pdf Verilog vs. VHDL]&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=838</id>
		<title>Team Cyc05</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=838"/>
		<updated>2013-02-06T23:13:13Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* PengQing */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{| border=&amp;quot;1&amp;quot; cellpadding=&amp;quot;5&amp;quot; cellspacing=&amp;quot;0&amp;quot; align=&amp;quot;right&amp;quot;&lt;br /&gt;
|+&#039;&#039;&#039;Team Cyc05&#039;&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| align=&amp;quot;center&amp;quot; width=&amp;quot;200px&amp;quot; | [[Image:Cy.jpg]]&lt;br /&gt;
|-&lt;br /&gt;
! style=&amp;quot;background:#CD1014;&amp;quot; | Cyc05 Team Logo&lt;br /&gt;
|-&lt;br /&gt;
|-&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; align=&amp;quot;center&amp;quot; |&lt;br /&gt;
{| border=&amp;quot;0&amp;quot; &lt;br /&gt;
|+&#039;&#039;Team Members&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| Osama G. Attia (ogamal)&lt;br /&gt;
|-&lt;br /&gt;
| Tyler Johnson (tyler07)&lt;br /&gt;
|-&lt;br /&gt;
| PengQing Xie (carterp)&lt;br /&gt;
|}&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Team Members ==&lt;br /&gt;
* Osama G. Attia&lt;br /&gt;
* Tyler Johnson&lt;br /&gt;
* PengQing Xie&lt;br /&gt;
&lt;br /&gt;
== Weekly Presentations ==&lt;br /&gt;
*Week 1 - [[Media:Cyc05_-_Presentation_01.pdf | Presentation Slides Week 1]]&lt;br /&gt;
*Week 2 - [[Media:Cyc05_Week_2.pdf | Presentation Slides Week 2]]&lt;br /&gt;
*Week 3 - [[Media:Cyc05_week3_presentation.pdf‎ | Presentation Slides Week 3]]&lt;br /&gt;
&lt;br /&gt;
== Wiki Contributions ==&lt;br /&gt;
=== Tyler ===&lt;br /&gt;
*Week 1&lt;br /&gt;
**[[Useful Modelsim Commands]]&lt;br /&gt;
**[[Media:Modelsim_pe_user_10.0d.pdf | Modelsim Users Guide]]&lt;br /&gt;
*Week2&lt;br /&gt;
** [[Media:Connect_Remotely_Via_VPN.pdf | Guide to Remote Connecting]]&lt;br /&gt;
*Week3&lt;br /&gt;
**[[Adding VHDL Files to a Project]] Additions and alterations&lt;br /&gt;
**Hosted the scripts for Kevinss tutorial and provided a link for it&lt;br /&gt;
**Modified the landing page to Kevni&#039;t tutorial to have the pdf, and a link to the scripts&lt;br /&gt;
**Modified [[Tutorial: Creating a Custom Bitfile]], some details were unclear and/or left out about using your newly built bitfile&lt;br /&gt;
&lt;br /&gt;
=== Osama ===&lt;br /&gt;
*Week 1: Creating Team Cyc05 page.&lt;br /&gt;
*Week 2:&lt;br /&gt;
**Updating [[Connecting to convey-1.ece.iastate.edu]] with usage policy.&lt;br /&gt;
**Adding [[Frequently Asked Questions]] page.&lt;br /&gt;
* Week 3:&lt;br /&gt;
**Updating the [[Frequently Asked Questions]] page.&lt;br /&gt;
**Adding and maintaining the [[Using the Memory Controller Interface]] page.&lt;br /&gt;
&lt;br /&gt;
=== PengQing ===&lt;br /&gt;
*Week 1:&lt;br /&gt;
**[http://sn0v.wordpress.com/2012/12/07/installing-cuda-5-on-ubuntu-12-04/ Installing CUDA on Ubuntu]&lt;br /&gt;
**[http://graphics.stanford.edu/~mhouston/public_talks/R520-mhouston.pdf General Purpose Computation on GPUs (GPGPU)]&lt;br /&gt;
*Week 2:&lt;br /&gt;
**[http://vol.verilog.com/VOL/main.htm Verilog self-study online course]&lt;br /&gt;
*Week 3:&lt;br /&gt;
***[http://www.ece.msstate.edu/~reese/EE4743/lectures/verilog_intro_2002/verilog_intro_2002.pdf Verilog vs. VHDL]&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=818</id>
		<title>Team Cyc05</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=818"/>
		<updated>2013-02-05T22:58:57Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* Wiki Contributions */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{| border=&amp;quot;1&amp;quot; cellpadding=&amp;quot;5&amp;quot; cellspacing=&amp;quot;0&amp;quot; align=&amp;quot;right&amp;quot;&lt;br /&gt;
|+&#039;&#039;&#039;Team Cyc05&#039;&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| align=&amp;quot;center&amp;quot; width=&amp;quot;200px&amp;quot; | [[Image:Cy.jpg]]&lt;br /&gt;
|-&lt;br /&gt;
! style=&amp;quot;background:#CD1014;&amp;quot; | Cyc05 Team Logo&lt;br /&gt;
|-&lt;br /&gt;
|-&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; align=&amp;quot;center&amp;quot; |&lt;br /&gt;
{| border=&amp;quot;0&amp;quot; &lt;br /&gt;
|+&#039;&#039;Team Members&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| Osama G. Attia (ogamal)&lt;br /&gt;
|-&lt;br /&gt;
| Tyler Johnson (tyler07)&lt;br /&gt;
|-&lt;br /&gt;
| PengQing Xie (carterp)&lt;br /&gt;
|}&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Team Members ==&lt;br /&gt;
* Osama G. Attia&lt;br /&gt;
* Tyler Johnson&lt;br /&gt;
* PengQing Xie&lt;br /&gt;
&lt;br /&gt;
== Weekly Presentations ==&lt;br /&gt;
*Week 1 - [[Media:Cyc05_-_Presentation_01.pdf | Presentation Slides Week 1]]&lt;br /&gt;
*Week 2 - [[Media:Cyc05_Week_2.pdf | Presentation Slides Week 2]]&lt;br /&gt;
&lt;br /&gt;
== Wiki Contributions ==&lt;br /&gt;
*Tyler&lt;br /&gt;
**Week 1&lt;br /&gt;
***[[Useful Modelsim Commands]]&lt;br /&gt;
***[[Media:Modelsim_pe_user_10.0d.pdf | Modelsim Users Guide]]&lt;br /&gt;
**Week2&lt;br /&gt;
*** [[Media:Connect_Remotely_Via_VPN.pdf | Guide to Remote Connecting]]&lt;br /&gt;
**Week3&lt;br /&gt;
***[[Adding VHDL Files to a Project]] Additions and alterations&lt;br /&gt;
***Hosted the scripts for Kevinss tutorial and provided a link for it&lt;br /&gt;
***Modified the landing page to Kevni&#039;t tutorial to have the pdf, and a link to the scripts&lt;br /&gt;
***Modified [[Tutorial: Creating a Custom Bitfile]], some details were unclear and/or left out about using your newly built bitfile&lt;br /&gt;
*Osama&lt;br /&gt;
**Week 1: Creating Team Cyc05 page.&lt;br /&gt;
**Week 2:&lt;br /&gt;
***Updating [[Connecting to convey-1.ece.iastate.edu]] with usage policy&lt;br /&gt;
***Adding [[Frequently Asked Questions]] page&lt;br /&gt;
&lt;br /&gt;
*PengQing&lt;br /&gt;
**Week 1:&lt;br /&gt;
***[http://sn0v.wordpress.com/2012/12/07/installing-cuda-5-on-ubuntu-12-04/ Installing CUDA on Ubuntu]&lt;br /&gt;
***[http://graphics.stanford.edu/~mhouston/public_talks/R520-mhouston.pdf General Purpose Computation on GPUs (GPGPU)]&lt;br /&gt;
**Week 2:&lt;br /&gt;
***[http://vol.verilog.com/VOL/main.htm Verilog self-study online course]&lt;br /&gt;
**Week 3:&lt;br /&gt;
***[http://www.ece.msstate.edu/~reese/EE4743/lectures/verilog_intro_2002/verilog_intro_2002.pdf Verilog vs. VHDL]&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=817</id>
		<title>Team Cyc05</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=817"/>
		<updated>2013-02-05T22:56:29Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* Wiki Contributions */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{| border=&amp;quot;1&amp;quot; cellpadding=&amp;quot;5&amp;quot; cellspacing=&amp;quot;0&amp;quot; align=&amp;quot;right&amp;quot;&lt;br /&gt;
|+&#039;&#039;&#039;Team Cyc05&#039;&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| align=&amp;quot;center&amp;quot; width=&amp;quot;200px&amp;quot; | [[Image:Cy.jpg]]&lt;br /&gt;
|-&lt;br /&gt;
! style=&amp;quot;background:#CD1014;&amp;quot; | Cyc05 Team Logo&lt;br /&gt;
|-&lt;br /&gt;
|-&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; align=&amp;quot;center&amp;quot; |&lt;br /&gt;
{| border=&amp;quot;0&amp;quot; &lt;br /&gt;
|+&#039;&#039;Team Members&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| Osama G. Attia (ogamal)&lt;br /&gt;
|-&lt;br /&gt;
| Tyler Johnson (tyler07)&lt;br /&gt;
|-&lt;br /&gt;
| PengQing Xie (carterp)&lt;br /&gt;
|}&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Team Members ==&lt;br /&gt;
* Osama G. Attia&lt;br /&gt;
* Tyler Johnson&lt;br /&gt;
* PengQing Xie&lt;br /&gt;
&lt;br /&gt;
== Weekly Presentations ==&lt;br /&gt;
*Week 1 - [[Media:Cyc05_-_Presentation_01.pdf | Presentation Slides Week 1]]&lt;br /&gt;
*Week 2 - [[Media:Cyc05_Week_2.pdf | Presentation Slides Week 2]]&lt;br /&gt;
&lt;br /&gt;
== Wiki Contributions ==&lt;br /&gt;
*Tyler&lt;br /&gt;
**Week 1&lt;br /&gt;
***[[Useful Modelsim Commands]]&lt;br /&gt;
***[[Media:Modelsim_pe_user_10.0d.pdf | Modelsim Users Guide]]&lt;br /&gt;
**Week2&lt;br /&gt;
*** [[Media:Connect_Remotely_Via_VPN.pdf | Guide to Remote Connecting]]&lt;br /&gt;
**Week3&lt;br /&gt;
***[[Adding VHDL Files to a Project]] Additions and alterations&lt;br /&gt;
***Hosted the scripts for Kevinss tutorial and provided a link for it&lt;br /&gt;
***Modified the landing page to Kevni&#039;t tutorial to have the pdf, and a link to the scripts&lt;br /&gt;
***Modified [[Tutorial: Creating a Custom Bitfile]], some details were unclear and/or left out about using your newly built bitfile&lt;br /&gt;
*Osama&lt;br /&gt;
**Week 1: Creating Team Cyc05 page.&lt;br /&gt;
**Week 2:&lt;br /&gt;
***Updating [[Connecting to convey-1.ece.iastate.edu]] with usage policy&lt;br /&gt;
***Adding [[Frequently Asked Questions]] page&lt;br /&gt;
&lt;br /&gt;
*PengQing&lt;br /&gt;
**Week 1:&lt;br /&gt;
***[http://sn0v.wordpress.com/2012/12/07/installing-cuda-5-on-ubuntu-12-04/ Installing CUDA on Ubuntu]&lt;br /&gt;
***[http://graphics.stanford.edu/~mhouston/public_talks/R520-mhouston.pdf General Purpose Computation on GPUs (GPGPU)]&lt;br /&gt;
**Week 2:&lt;br /&gt;
***&lt;br /&gt;
**Week 3:&lt;br /&gt;
***[http://www.ece.msstate.edu/~reese/EE4743/lectures/verilog_intro_2002/verilog_intro_2002.pdf Verilog vs. VHDL]&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=816</id>
		<title>Team Cyc05</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=816"/>
		<updated>2013-02-05T22:55:53Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* Wiki Contributions */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{| border=&amp;quot;1&amp;quot; cellpadding=&amp;quot;5&amp;quot; cellspacing=&amp;quot;0&amp;quot; align=&amp;quot;right&amp;quot;&lt;br /&gt;
|+&#039;&#039;&#039;Team Cyc05&#039;&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| align=&amp;quot;center&amp;quot; width=&amp;quot;200px&amp;quot; | [[Image:Cy.jpg]]&lt;br /&gt;
|-&lt;br /&gt;
! style=&amp;quot;background:#CD1014;&amp;quot; | Cyc05 Team Logo&lt;br /&gt;
|-&lt;br /&gt;
|-&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; align=&amp;quot;center&amp;quot; |&lt;br /&gt;
{| border=&amp;quot;0&amp;quot; &lt;br /&gt;
|+&#039;&#039;Team Members&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| Osama G. Attia (ogamal)&lt;br /&gt;
|-&lt;br /&gt;
| Tyler Johnson (tyler07)&lt;br /&gt;
|-&lt;br /&gt;
| PengQing Xie (carterp)&lt;br /&gt;
|}&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Team Members ==&lt;br /&gt;
* Osama G. Attia&lt;br /&gt;
* Tyler Johnson&lt;br /&gt;
* PengQing Xie&lt;br /&gt;
&lt;br /&gt;
== Weekly Presentations ==&lt;br /&gt;
*Week 1 - [[Media:Cyc05_-_Presentation_01.pdf | Presentation Slides Week 1]]&lt;br /&gt;
*Week 2 - [[Media:Cyc05_Week_2.pdf | Presentation Slides Week 2]]&lt;br /&gt;
&lt;br /&gt;
== Wiki Contributions ==&lt;br /&gt;
*Tyler&lt;br /&gt;
**Week 1&lt;br /&gt;
***[[Useful Modelsim Commands]]&lt;br /&gt;
***[[Media:Modelsim_pe_user_10.0d.pdf | Modelsim Users Guide]]&lt;br /&gt;
**Week2&lt;br /&gt;
*** [[Media:Connect_Remotely_Via_VPN.pdf | Guide to Remote Connecting]]&lt;br /&gt;
**Week3&lt;br /&gt;
***[[Adding VHDL Files to a Project]] Additions and alterations&lt;br /&gt;
***Hosted the scripts for Kevinss tutorial and provided a link for it&lt;br /&gt;
***Modified the landing page to Kevni&#039;t tutorial to have the pdf, and a link to the scripts&lt;br /&gt;
***Modified [[Tutorial: Creating a Custom Bitfile]], some details were unclear and/or left out about using your newly built bitfile&lt;br /&gt;
*Osama&lt;br /&gt;
**Week 1: Creating Team Cyc05 page.&lt;br /&gt;
**Week 2:&lt;br /&gt;
***Updating [[Connecting to convey-1.ece.iastate.edu]] with usage policy&lt;br /&gt;
***Adding [[Frequently Asked Questions]] page&lt;br /&gt;
&lt;br /&gt;
*PengQing&lt;br /&gt;
**Week 1:&lt;br /&gt;
***[http://sn0v.wordpress.com/2012/12/07/installing-cuda-5-on-ubuntu-12-04/ Installing CUDA on Ubuntu]&lt;br /&gt;
***[http://graphics.stanford.edu/~mhouston/public_talks/R520-mhouston.pdf General Purpose Computation on GPUs (GPGPU)]&lt;br /&gt;
**Week 2:&lt;br /&gt;
***&lt;br /&gt;
**Week 3:&lt;br /&gt;
***[http://www.ece.msstate.edu/~reese/EE4743/lectures/verilog_intro_2002/verilog_intro_2002.pdf]&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=815</id>
		<title>Team Cyc05</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=815"/>
		<updated>2013-02-05T22:55:29Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* Wiki Contributions */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{| border=&amp;quot;1&amp;quot; cellpadding=&amp;quot;5&amp;quot; cellspacing=&amp;quot;0&amp;quot; align=&amp;quot;right&amp;quot;&lt;br /&gt;
|+&#039;&#039;&#039;Team Cyc05&#039;&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| align=&amp;quot;center&amp;quot; width=&amp;quot;200px&amp;quot; | [[Image:Cy.jpg]]&lt;br /&gt;
|-&lt;br /&gt;
! style=&amp;quot;background:#CD1014;&amp;quot; | Cyc05 Team Logo&lt;br /&gt;
|-&lt;br /&gt;
|-&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; align=&amp;quot;center&amp;quot; |&lt;br /&gt;
{| border=&amp;quot;0&amp;quot; &lt;br /&gt;
|+&#039;&#039;Team Members&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| Osama G. Attia (ogamal)&lt;br /&gt;
|-&lt;br /&gt;
| Tyler Johnson (tyler07)&lt;br /&gt;
|-&lt;br /&gt;
| PengQing Xie (carterp)&lt;br /&gt;
|}&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Team Members ==&lt;br /&gt;
* Osama G. Attia&lt;br /&gt;
* Tyler Johnson&lt;br /&gt;
* PengQing Xie&lt;br /&gt;
&lt;br /&gt;
== Weekly Presentations ==&lt;br /&gt;
*Week 1 - [[Media:Cyc05_-_Presentation_01.pdf | Presentation Slides Week 1]]&lt;br /&gt;
*Week 2 - [[Media:Cyc05_Week_2.pdf | Presentation Slides Week 2]]&lt;br /&gt;
&lt;br /&gt;
== Wiki Contributions ==&lt;br /&gt;
*Tyler&lt;br /&gt;
**Week 1&lt;br /&gt;
***[[Useful Modelsim Commands]]&lt;br /&gt;
***[[Media:Modelsim_pe_user_10.0d.pdf | Modelsim Users Guide]]&lt;br /&gt;
**Week2&lt;br /&gt;
*** [[Media:Connect_Remotely_Via_VPN.pdf | Guide to Remote Connecting]]&lt;br /&gt;
**Week3&lt;br /&gt;
***[[Adding VHDL Files to a Project]] Additions and alterations&lt;br /&gt;
***Hosted the scripts for Kevinss tutorial and provided a link for it&lt;br /&gt;
***Modified the landing page to Kevni&#039;t tutorial to have the pdf, and a link to the scripts&lt;br /&gt;
***Modified [[Tutorial: Creating a Custom Bitfile]], some details were unclear and/or left out about using your newly built bitfile&lt;br /&gt;
*Osama&lt;br /&gt;
**Week 1: Creating Team Cyc05 page.&lt;br /&gt;
**Week 2:&lt;br /&gt;
***Updating [[Connecting to convey-1.ece.iastate.edu]] with usage policy&lt;br /&gt;
***Adding [[Frequently Asked Questions]] page&lt;br /&gt;
&lt;br /&gt;
*PengQing&lt;br /&gt;
**Week 1:&lt;br /&gt;
***[http://sn0v.wordpress.com/2012/12/07/installing-cuda-5-on-ubuntu-12-04/ Installing CUDA on Ubuntu]&lt;br /&gt;
***[http://graphics.stanford.edu/~mhouston/public_talks/R520-mhouston.pdf General Purpose Computation on GPUs (GPGPU)]&lt;br /&gt;
**Week 2:&lt;br /&gt;
***&lt;br /&gt;
**Week 3:http://www.ece.msstate.edu/~reese/EE4743/lectures/verilog_intro_2002/verilog_intro_2002.pdf&lt;br /&gt;
***&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=811</id>
		<title>Team Cyc05</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=811"/>
		<updated>2013-02-05T22:27:04Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* Wiki Contributions */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{| border=&amp;quot;1&amp;quot; cellpadding=&amp;quot;5&amp;quot; cellspacing=&amp;quot;0&amp;quot; align=&amp;quot;right&amp;quot;&lt;br /&gt;
|+&#039;&#039;&#039;Team Cyc05&#039;&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| align=&amp;quot;center&amp;quot; width=&amp;quot;200px&amp;quot; | [[Image:Cy.jpg]]&lt;br /&gt;
|-&lt;br /&gt;
! style=&amp;quot;background:#CD1014;&amp;quot; | Cyc05 Team Logo&lt;br /&gt;
|-&lt;br /&gt;
|-&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; align=&amp;quot;center&amp;quot; |&lt;br /&gt;
{| border=&amp;quot;0&amp;quot; &lt;br /&gt;
|+&#039;&#039;Team Members&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| Osama G. Attia (ogamal)&lt;br /&gt;
|-&lt;br /&gt;
| Tyler Johnson (tyler07)&lt;br /&gt;
|-&lt;br /&gt;
| PengQing Xie (carterp)&lt;br /&gt;
|}&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Team Members ==&lt;br /&gt;
* Osama G. Attia&lt;br /&gt;
* Tyler Johnson&lt;br /&gt;
* PengQing Xie&lt;br /&gt;
&lt;br /&gt;
== Weekly Presentations ==&lt;br /&gt;
*Week 1 - [[Media:Cyc05_-_Presentation_01.pdf | Presentation Slides Week 1]]&lt;br /&gt;
*Week 2 - [[Media:Cyc05_Week_2.pdf | Presentation Slides Week 2]]&lt;br /&gt;
&lt;br /&gt;
== Wiki Contributions ==&lt;br /&gt;
*Tyler&lt;br /&gt;
**Week 1&lt;br /&gt;
***[[Useful Modelsim Commands]]&lt;br /&gt;
***[[Media:Modelsim_pe_user_10.0d.pdf | Modelsim Users Guide]]&lt;br /&gt;
**Week2&lt;br /&gt;
*** [[Media:Connect_Remotely_Via_VPN.pdf | Guide to Remote Connecting]]&lt;br /&gt;
**Week3&lt;br /&gt;
***[[Adding VHDL Files to a Project]] Additions and alterations&lt;br /&gt;
***Hosted the scripts for Kevinss tutorial and provided a link for it&lt;br /&gt;
***Modified the landing page to Kevni&#039;t tutorial to have the pdf, and a link to the scripts&lt;br /&gt;
***Modified [[Tutorial: Creating a Custom Bitfile]], some details were unclear and/or left out about using your newly built bitfile&lt;br /&gt;
*Osama&lt;br /&gt;
**Week 1: Creating Team Cyc05 page.&lt;br /&gt;
**Week 2:&lt;br /&gt;
***Updating [[Connecting to convey-1.ece.iastate.edu]] with usage policy&lt;br /&gt;
***Adding [[Frequently Asked Questions]] page&lt;br /&gt;
&lt;br /&gt;
*PengQing&lt;br /&gt;
**Week 1:&lt;br /&gt;
***[http://sn0v.wordpress.com/2012/12/07/installing-cuda-5-on-ubuntu-12-04/ Installing CUDA on Ubuntu]&lt;br /&gt;
***[http://graphics.stanford.edu/~mhouston/public_talks/R520-mhouston.pdf General Purpose Computation on GPUs (GPGPU)]&lt;br /&gt;
**Week 2:&lt;br /&gt;
***&lt;br /&gt;
**Week 3:&lt;br /&gt;
***&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=810</id>
		<title>Team Cyc05</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=810"/>
		<updated>2013-02-05T22:26:31Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* Wiki Contributions */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{| border=&amp;quot;1&amp;quot; cellpadding=&amp;quot;5&amp;quot; cellspacing=&amp;quot;0&amp;quot; align=&amp;quot;right&amp;quot;&lt;br /&gt;
|+&#039;&#039;&#039;Team Cyc05&#039;&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| align=&amp;quot;center&amp;quot; width=&amp;quot;200px&amp;quot; | [[Image:Cy.jpg]]&lt;br /&gt;
|-&lt;br /&gt;
! style=&amp;quot;background:#CD1014;&amp;quot; | Cyc05 Team Logo&lt;br /&gt;
|-&lt;br /&gt;
|-&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; align=&amp;quot;center&amp;quot; |&lt;br /&gt;
{| border=&amp;quot;0&amp;quot; &lt;br /&gt;
|+&#039;&#039;Team Members&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| Osama G. Attia (ogamal)&lt;br /&gt;
|-&lt;br /&gt;
| Tyler Johnson (tyler07)&lt;br /&gt;
|-&lt;br /&gt;
| PengQing Xie (carterp)&lt;br /&gt;
|}&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Team Members ==&lt;br /&gt;
* Osama G. Attia&lt;br /&gt;
* Tyler Johnson&lt;br /&gt;
* PengQing Xie&lt;br /&gt;
&lt;br /&gt;
== Weekly Presentations ==&lt;br /&gt;
*Week 1 - [[Media:Cyc05_-_Presentation_01.pdf | Presentation Slides Week 1]]&lt;br /&gt;
*Week 2 - [[Media:Cyc05_Week_2.pdf | Presentation Slides Week 2]]&lt;br /&gt;
&lt;br /&gt;
== Wiki Contributions ==&lt;br /&gt;
*Tyler&lt;br /&gt;
**Week 1&lt;br /&gt;
***[[Useful Modelsim Commands]]&lt;br /&gt;
***[[Media:Modelsim_pe_user_10.0d.pdf | Modelsim Users Guide]]&lt;br /&gt;
**Week2&lt;br /&gt;
*** [[Media:Connect_Remotely_Via_VPN.pdf | Guide to Remote Connecting]]&lt;br /&gt;
**Week3&lt;br /&gt;
***[[Adding VHDL Files to a Project]] Additions and alterations&lt;br /&gt;
***Hosted the scripts for Kevinss tutorial and provided a link for it&lt;br /&gt;
***Modified the landing page to Kevni&#039;t tutorial to have the pdf, and a link to the scripts&lt;br /&gt;
***Modified [[Tutorial: Creating a Custom Bitfile]], some details were unclear and/or left out about using your newly built bitfile&lt;br /&gt;
*Osama&lt;br /&gt;
**Week 1: Creating Team Cyc05 page.&lt;br /&gt;
**Week 2:&lt;br /&gt;
***Updating [[Connecting to convey-1.ece.iastate.edu]] with usage policy&lt;br /&gt;
***Adding [[Frequently Asked Questions]] page&lt;br /&gt;
&lt;br /&gt;
*PengQing&lt;br /&gt;
**Week 1:&lt;br /&gt;
**[http://sn0v.wordpress.com/2012/12/07/installing-cuda-5-on-ubuntu-12-04/ Installing CUDA on Ubuntu]&lt;br /&gt;
**[http://graphics.stanford.edu/~mhouston/public_talks/R520-mhouston.pdf General Purpose Computation on GPUs (GPGPU)]&lt;br /&gt;
**Week 2:&lt;br /&gt;
**Week 3:&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Main_Page&amp;diff=723</id>
		<title>Main Page</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Main_Page&amp;diff=723"/>
		<updated>2013-01-22T04:11:14Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* Helpful Guides */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Articles ==&lt;br /&gt;
=== Convey HC-1 Tutorials ===&lt;br /&gt;
* [[Connecting to convey-1.ece.iastate.edu]]&lt;br /&gt;
* [[Convey environment setup|Setting Up Environment Variables on Convey&#039;s HC-1]]&lt;br /&gt;
* [[Running the Vector Adder Example Application]]&lt;br /&gt;
* Convey pdk tutorial: [[image:ConveyTutorial1.pdf]] (uses newCnyProject script)&lt;br /&gt;
* [[Analyze the Simpleton Basic App]]&lt;br /&gt;
* [[Tutorial: Creating a Custom Bitfile | Create a Custom Bitfile]]&lt;br /&gt;
* [[Using a Custom Bitfile in C Code]]&lt;br /&gt;
* [[Adding VHDL Files to a Project]]&lt;br /&gt;
* [[The Verilog Hardware Interface for CAE]]&lt;br /&gt;
* [[Using ISE&#039;s Core Generator to build FIFOs and other IP cores]]&lt;br /&gt;
* [[Running Different Bitfiles on each AE | Projects with Multiple Bitfiles]]&lt;br /&gt;
* [[Using the Write-Complete Interface]]&lt;br /&gt;
* [[Using the Timing Analyzer]]&lt;br /&gt;
&lt;br /&gt;
* [[Using SPAT]]&lt;br /&gt;
* [[Using GPROF]]&lt;br /&gt;
* [[Convey vector example | Example of Loop Unrolling using FPGA]]&lt;br /&gt;
* [[Sobel Algorithm | Speeding up Sobel Algorithm]]&lt;br /&gt;
&lt;br /&gt;
== Reference Manuals ==&lt;br /&gt;
=== Convey ===&lt;br /&gt;
* [[Media:ConveyPDKReferenceManual.pdf | Convey PDK Reference Manual (.pdf)]] (updated to V5.2; April 2012)&lt;br /&gt;
* [[Media:ConveyProgrammersGuide.pdf | Convey Programmers Guide (.pdf)]] (updated to V1.8; November 2010)&lt;br /&gt;
* [[Media:ConveyReferenceManual.pdf | Convey Reference Manual (.pdf)]]&lt;br /&gt;
* [[Media:ConveySpatUsersGuide.pdf | Convey SPAT (Simulator Performance Analysis Tool) Guide]]&lt;br /&gt;
* [[Media:Convey PDK Training.pdf | Convey PDK (.pdf)]]&lt;br /&gt;
* [[Media:Convey Overview.pdf | Convey Overview (.pdf)]]&lt;br /&gt;
&lt;br /&gt;
The newet version of these documents are available at [http://www.conveysupport.com/help/?page_id=112 Convey&#039;s Support Site]&lt;br /&gt;
&lt;br /&gt;
=== CUDA ===&lt;br /&gt;
* [[Media:CUDA_C_Programming_Guide.pdf | CUDA_C_Programming_Guide (.pdf)]]&lt;br /&gt;
* [[Media:CUDA_C_Best_Practices_Guide.pdf | CUDA_C_Best_Practices_Guide(.pdf)]]&lt;br /&gt;
* [[Media:CUDA_Memory.pdf | CUDA_Memory (.pdf)]]&lt;br /&gt;
&lt;br /&gt;
==Links==&lt;br /&gt;
* [http://www.asic-world.com www.asic-world.com] - Great Tutorials for those Learning HDLs&lt;br /&gt;
* [http://memocode.irisa.fr MemoCODE 2012]&lt;br /&gt;
** [[Media:2012-memocode-contest.pdf | MemoCODE Contest.pdf]]&lt;br /&gt;
** [http://memocode.irisa.fr/2012/2012-memocode-contest.tar.gz Reference Implementation]&lt;br /&gt;
** [ftp://ftp-trace.ncbi.nih.gov/1000genomes/ftp/technical/reference/human_g1k_v37.fasta.gz Human Reference Genome (human_g1k_v37.fasta.gz)]&lt;br /&gt;
** [ftp://ftp-trace.ncbi.nih.gov/1000genomes/ftp/data/NA06985/sequence_read/ERR050082.filt.fastq.gz Example Reads (ERR050082.filt.fastq.gz)]&lt;br /&gt;
** [http://ftp.1000genomes.ebi.ac.uk/vol1/ftp/data/NA06985/sequence_read/ERR050082.filt.fastq.gz Example Reads (Alternative Link) (ERR050082.filt.fastq.gz)]&lt;br /&gt;
&lt;br /&gt;
* [[2010 Main Page | CprE 584 2010 Wiki Main Page]]&lt;br /&gt;
* [http://class.ee.iastate.edu/cpre583/ CprE 583 Website]&lt;br /&gt;
* [http://class.ece.iastate.edu/cpre584/ CprE 584 Website]&lt;br /&gt;
&lt;br /&gt;
=== Other Articles ===&lt;br /&gt;
* [[Assignment|Assignments]]&lt;br /&gt;
* [[A quick start on CUDA]]&lt;br /&gt;
&lt;br /&gt;
== Helpful Guides ==&lt;br /&gt;
* [http://www.c7t-hdl.com/Docs/C7T_AN05_Customized_WaveView_ModelSim_ISE.pdf Modelsim and ISE]&lt;br /&gt;
* [http://www.fpga.com.cn/hdl/training/verilog%20reference%20guide.pdf The Verilog Golden Reference]&lt;br /&gt;
* [http://courseware.ee.calpoly.edu/~bmealy/shock_awe_vhdl_adobe.pdf &amp;quot;The Shock and Awe&amp;quot; VHDL Tutorial]&lt;br /&gt;
* [http://esd.cs.ucr.edu/labs/tutorial/ VHDL Simple Code Examples]&lt;br /&gt;
* [http://www.seas.upenn.edu/~ese171/vhdl/vhdl_primer.html VHDL Primer]&lt;br /&gt;
* [http://www.kxcad.net/electronic_Xilinx_guide/mergedProjects/xsim/html/xs_p_ml_instantiation.htm Using VHDL components in Verilog]&lt;br /&gt;
* [[Media:Modelsim_pe_user_10.0d.pdf | Modelsim Users Guide]]&lt;br /&gt;
* [[Useful Modelsim Commands]]&lt;br /&gt;
* [http://sn0v.wordpress.com/2012/12/07/installing-cuda-5-on-ubuntu-12-04/ Installing CUDA on Ubuntu]&lt;br /&gt;
* [http://graphics.stanford.edu/~mhouston/public_talks/R520-mhouston.pdf General Purpose Computation on GPUs (GPGPU)]&lt;br /&gt;
&lt;br /&gt;
== Readings for Memocode 2012 ==&lt;br /&gt;
*[[Media:Brief_Bioinform-2010-Li-473-83.pdf|A survey on algorithms for sequencing]]&lt;br /&gt;
*[[Media:Gb-2009-10-3-r25.pdf|Burrows-Wheeler indexing]]&lt;br /&gt;
&lt;br /&gt;
== Spring 2012 Teams ==&lt;br /&gt;
* [[Team Gryffindor]]&lt;br /&gt;
* [[Team Slytherin]]&lt;br /&gt;
* [[Team 142857]]&lt;br /&gt;
== Spring 2013 Teams ==&lt;br /&gt;
* [[Team Cyc05]]&lt;br /&gt;
* [[Team Challenger]]&lt;br /&gt;
* [[Team Blitz]]&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=722</id>
		<title>Team Cyc05</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=722"/>
		<updated>2013-01-22T04:05:03Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* Wiki Contributions */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{| border=&amp;quot;1&amp;quot; cellpadding=&amp;quot;5&amp;quot; cellspacing=&amp;quot;0&amp;quot; align=&amp;quot;right&amp;quot;&lt;br /&gt;
|+&#039;&#039;&#039;Team Cyc05&#039;&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| align=&amp;quot;center&amp;quot; width=&amp;quot;200px&amp;quot; | [[Image:Cy.jpg]]&lt;br /&gt;
|-&lt;br /&gt;
! style=&amp;quot;background:#CD1014;&amp;quot; | Cyc05 Team Logo&lt;br /&gt;
|-&lt;br /&gt;
|-&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; align=&amp;quot;center&amp;quot; |&lt;br /&gt;
{| border=&amp;quot;0&amp;quot; &lt;br /&gt;
|+&#039;&#039;Team Members&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| Osama G. Attia (ogamal)&lt;br /&gt;
|-&lt;br /&gt;
| Tyler Johnson (tyler07)&lt;br /&gt;
|-&lt;br /&gt;
| PengQing Xie (carterp)&lt;br /&gt;
|}&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Team Members ==&lt;br /&gt;
* Osama G. Attia&lt;br /&gt;
* Tyler Johnson&lt;br /&gt;
* PengQing Xie&lt;br /&gt;
&lt;br /&gt;
== Weekly Presentations ==&lt;br /&gt;
*Week 1 [Insert Link]&lt;br /&gt;
== Wiki Contributions ==&lt;br /&gt;
*Tyler&lt;br /&gt;
**[[Useful Modelsim Commands]]&lt;br /&gt;
**[[Media:Modelsim_pe_user_10.0d.pdf | Modelsim Users Guide]]&lt;br /&gt;
*Osama&lt;br /&gt;
*PengQing&lt;br /&gt;
**[http://sn0v.wordpress.com/2012/12/07/installing-cuda-5-on-ubuntu-12-04/ Installing CUDA on Ubuntu]&lt;br /&gt;
**[http://graphics.stanford.edu/~mhouston/public_talks/R520-mhouston.pdf General Purpose Computation on GPUs (GPGPU)]&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=721</id>
		<title>Team Cyc05</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Team_Cyc05&amp;diff=721"/>
		<updated>2013-01-22T03:57:30Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* Wiki Contributions */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{| border=&amp;quot;1&amp;quot; cellpadding=&amp;quot;5&amp;quot; cellspacing=&amp;quot;0&amp;quot; align=&amp;quot;right&amp;quot;&lt;br /&gt;
|+&#039;&#039;&#039;Team Cyc05&#039;&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| align=&amp;quot;center&amp;quot; width=&amp;quot;200px&amp;quot; | [[Image:Cy.jpg]]&lt;br /&gt;
|-&lt;br /&gt;
! style=&amp;quot;background:#CD1014;&amp;quot; | Cyc05 Team Logo&lt;br /&gt;
|-&lt;br /&gt;
|-&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; align=&amp;quot;center&amp;quot; |&lt;br /&gt;
{| border=&amp;quot;0&amp;quot; &lt;br /&gt;
|+&#039;&#039;Team Members&#039;&#039;&lt;br /&gt;
|-&lt;br /&gt;
| Osama G. Attia (ogamal)&lt;br /&gt;
|-&lt;br /&gt;
| Tyler Johnson (tyler07)&lt;br /&gt;
|-&lt;br /&gt;
| PengQing Xie (carterp)&lt;br /&gt;
|}&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Team Members ==&lt;br /&gt;
* Osama G. Attia&lt;br /&gt;
* Tyler Johnson&lt;br /&gt;
* PengQing Xie&lt;br /&gt;
&lt;br /&gt;
== Weekly Presentations ==&lt;br /&gt;
*Week 1 [Insert Link]&lt;br /&gt;
== Wiki Contributions ==&lt;br /&gt;
*Tyler&lt;br /&gt;
**[[Useful Modelsim Commands]]&lt;br /&gt;
**[[Media:Modelsim_pe_user_10.0d.pdf | Modelsim Users Guide]]&lt;br /&gt;
*Osama&lt;br /&gt;
*PengQing&lt;br /&gt;
**[http://sn0v.wordpress.com/2012/12/07/installing-cuda-5-on-ubuntu-12-04/ Installing CUDA on Ubuntu]&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Main_Page&amp;diff=720</id>
		<title>Main Page</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Main_Page&amp;diff=720"/>
		<updated>2013-01-22T03:56:44Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* Helpful Guides */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Articles ==&lt;br /&gt;
=== Convey HC-1 Tutorials ===&lt;br /&gt;
* [[Connecting to convey-1.ece.iastate.edu]]&lt;br /&gt;
* [[Convey environment setup|Setting Up Environment Variables on Convey&#039;s HC-1]]&lt;br /&gt;
* [[Running the Vector Adder Example Application]]&lt;br /&gt;
* Convey pdk tutorial: [[image:ConveyTutorial1.pdf]] (uses newCnyProject script)&lt;br /&gt;
* [[Analyze the Simpleton Basic App]]&lt;br /&gt;
* [[Tutorial: Creating a Custom Bitfile | Create a Custom Bitfile]]&lt;br /&gt;
* [[Using a Custom Bitfile in C Code]]&lt;br /&gt;
* [[Adding VHDL Files to a Project]]&lt;br /&gt;
* [[The Verilog Hardware Interface for CAE]]&lt;br /&gt;
* [[Using ISE&#039;s Core Generator to build FIFOs and other IP cores]]&lt;br /&gt;
* [[Running Different Bitfiles on each AE | Projects with Multiple Bitfiles]]&lt;br /&gt;
* [[Using the Write-Complete Interface]]&lt;br /&gt;
* [[Using the Timing Analyzer]]&lt;br /&gt;
&lt;br /&gt;
* [[Using SPAT]]&lt;br /&gt;
* [[Using GPROF]]&lt;br /&gt;
* [[Convey vector example | Example of Loop Unrolling using FPGA]]&lt;br /&gt;
* [[Sobel Algorithm | Speeding up Sobel Algorithm]]&lt;br /&gt;
&lt;br /&gt;
== Reference Manuals ==&lt;br /&gt;
=== Convey ===&lt;br /&gt;
* [[Media:ConveyPDKReferenceManual.pdf | Convey PDK Reference Manual (.pdf)]] (updated to V5.2; April 2012)&lt;br /&gt;
* [[Media:ConveyProgrammersGuide.pdf | Convey Programmers Guide (.pdf)]] (updated to V1.8; November 2010)&lt;br /&gt;
* [[Media:ConveyReferenceManual.pdf | Convey Reference Manual (.pdf)]]&lt;br /&gt;
* [[Media:ConveySpatUsersGuide.pdf | Convey SPAT (Simulator Performance Analysis Tool) Guide]]&lt;br /&gt;
* [[Media:Convey PDK Training.pdf | Convey PDK (.pdf)]]&lt;br /&gt;
* [[Media:Convey Overview.pdf | Convey Overview (.pdf)]]&lt;br /&gt;
&lt;br /&gt;
The newet version of these documents are available at [http://www.conveysupport.com/help/?page_id=112 Convey&#039;s Support Site]&lt;br /&gt;
&lt;br /&gt;
=== CUDA ===&lt;br /&gt;
* [[Media:CUDA_C_Programming_Guide.pdf | CUDA_C_Programming_Guide (.pdf)]]&lt;br /&gt;
* [[Media:CUDA_C_Best_Practices_Guide.pdf | CUDA_C_Best_Practices_Guide(.pdf)]]&lt;br /&gt;
* [[Media:CUDA_Memory.pdf | CUDA_Memory (.pdf)]]&lt;br /&gt;
&lt;br /&gt;
==Links==&lt;br /&gt;
* [http://www.asic-world.com www.asic-world.com] - Great Tutorials for those Learning HDLs&lt;br /&gt;
* [http://memocode.irisa.fr MemoCODE 2012]&lt;br /&gt;
** [[Media:2012-memocode-contest.pdf | MemoCODE Contest.pdf]]&lt;br /&gt;
** [http://memocode.irisa.fr/2012/2012-memocode-contest.tar.gz Reference Implementation]&lt;br /&gt;
** [ftp://ftp-trace.ncbi.nih.gov/1000genomes/ftp/technical/reference/human_g1k_v37.fasta.gz Human Reference Genome (human_g1k_v37.fasta.gz)]&lt;br /&gt;
** [ftp://ftp-trace.ncbi.nih.gov/1000genomes/ftp/data/NA06985/sequence_read/ERR050082.filt.fastq.gz Example Reads (ERR050082.filt.fastq.gz)]&lt;br /&gt;
** [http://ftp.1000genomes.ebi.ac.uk/vol1/ftp/data/NA06985/sequence_read/ERR050082.filt.fastq.gz Example Reads (Alternative Link) (ERR050082.filt.fastq.gz)]&lt;br /&gt;
&lt;br /&gt;
* [[2010 Main Page | CprE 584 2010 Wiki Main Page]]&lt;br /&gt;
* [http://class.ee.iastate.edu/cpre583/ CprE 583 Website]&lt;br /&gt;
* [http://class.ece.iastate.edu/cpre584/ CprE 584 Website]&lt;br /&gt;
&lt;br /&gt;
=== Other Articles ===&lt;br /&gt;
* [[Assignment|Assignments]]&lt;br /&gt;
* [[A quick start on CUDA]]&lt;br /&gt;
&lt;br /&gt;
== Helpful Guides ==&lt;br /&gt;
* [http://www.c7t-hdl.com/Docs/C7T_AN05_Customized_WaveView_ModelSim_ISE.pdf Modelsim and ISE]&lt;br /&gt;
* [http://www.fpga.com.cn/hdl/training/verilog%20reference%20guide.pdf The Verilog Golden Reference]&lt;br /&gt;
* [http://courseware.ee.calpoly.edu/~bmealy/shock_awe_vhdl_adobe.pdf &amp;quot;The Shock and Awe&amp;quot; VHDL Tutorial]&lt;br /&gt;
* [http://esd.cs.ucr.edu/labs/tutorial/ VHDL Simple Code Examples]&lt;br /&gt;
* [http://www.seas.upenn.edu/~ese171/vhdl/vhdl_primer.html VHDL Primer]&lt;br /&gt;
* [http://www.kxcad.net/electronic_Xilinx_guide/mergedProjects/xsim/html/xs_p_ml_instantiation.htm Using VHDL components in Verilog]&lt;br /&gt;
* [[Media:Modelsim_pe_user_10.0d.pdf | Modelsim Users Guide]]&lt;br /&gt;
* [[Useful Modelsim Commands]]&lt;br /&gt;
* [http://sn0v.wordpress.com/2012/12/07/installing-cuda-5-on-ubuntu-12-04/ Installing CUDA on Ubuntu]&lt;br /&gt;
&lt;br /&gt;
== Readings for Memocode 2012 ==&lt;br /&gt;
*[[Media:Brief_Bioinform-2010-Li-473-83.pdf|A survey on algorithms for sequencing]]&lt;br /&gt;
*[[Media:Gb-2009-10-3-r25.pdf|Burrows-Wheeler indexing]]&lt;br /&gt;
&lt;br /&gt;
== Spring 2012 Teams ==&lt;br /&gt;
* [[Team Gryffindor]]&lt;br /&gt;
* [[Team Slytherin]]&lt;br /&gt;
* [[Team 142857]]&lt;br /&gt;
== Spring 2013 Teams ==&lt;br /&gt;
* [[Team Cyc05]]&lt;br /&gt;
* [[Team Challenger]]&lt;br /&gt;
* [[Team Blitz]]&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
	<entry>
		<id>https://wikis.ece.iastate.edu/cpre584/index.php?title=Main_Page&amp;diff=719</id>
		<title>Main Page</title>
		<link rel="alternate" type="text/html" href="https://wikis.ece.iastate.edu/cpre584/index.php?title=Main_Page&amp;diff=719"/>
		<updated>2013-01-22T03:55:56Z</updated>

		<summary type="html">&lt;p&gt;Carterp: /* Helpful Guides */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Articles ==&lt;br /&gt;
=== Convey HC-1 Tutorials ===&lt;br /&gt;
* [[Connecting to convey-1.ece.iastate.edu]]&lt;br /&gt;
* [[Convey environment setup|Setting Up Environment Variables on Convey&#039;s HC-1]]&lt;br /&gt;
* [[Running the Vector Adder Example Application]]&lt;br /&gt;
* Convey pdk tutorial: [[image:ConveyTutorial1.pdf]] (uses newCnyProject script)&lt;br /&gt;
* [[Analyze the Simpleton Basic App]]&lt;br /&gt;
* [[Tutorial: Creating a Custom Bitfile | Create a Custom Bitfile]]&lt;br /&gt;
* [[Using a Custom Bitfile in C Code]]&lt;br /&gt;
* [[Adding VHDL Files to a Project]]&lt;br /&gt;
* [[The Verilog Hardware Interface for CAE]]&lt;br /&gt;
* [[Using ISE&#039;s Core Generator to build FIFOs and other IP cores]]&lt;br /&gt;
* [[Running Different Bitfiles on each AE | Projects with Multiple Bitfiles]]&lt;br /&gt;
* [[Using the Write-Complete Interface]]&lt;br /&gt;
* [[Using the Timing Analyzer]]&lt;br /&gt;
&lt;br /&gt;
* [[Using SPAT]]&lt;br /&gt;
* [[Using GPROF]]&lt;br /&gt;
* [[Convey vector example | Example of Loop Unrolling using FPGA]]&lt;br /&gt;
* [[Sobel Algorithm | Speeding up Sobel Algorithm]]&lt;br /&gt;
&lt;br /&gt;
== Reference Manuals ==&lt;br /&gt;
=== Convey ===&lt;br /&gt;
* [[Media:ConveyPDKReferenceManual.pdf | Convey PDK Reference Manual (.pdf)]] (updated to V5.2; April 2012)&lt;br /&gt;
* [[Media:ConveyProgrammersGuide.pdf | Convey Programmers Guide (.pdf)]] (updated to V1.8; November 2010)&lt;br /&gt;
* [[Media:ConveyReferenceManual.pdf | Convey Reference Manual (.pdf)]]&lt;br /&gt;
* [[Media:ConveySpatUsersGuide.pdf | Convey SPAT (Simulator Performance Analysis Tool) Guide]]&lt;br /&gt;
* [[Media:Convey PDK Training.pdf | Convey PDK (.pdf)]]&lt;br /&gt;
* [[Media:Convey Overview.pdf | Convey Overview (.pdf)]]&lt;br /&gt;
&lt;br /&gt;
The newet version of these documents are available at [http://www.conveysupport.com/help/?page_id=112 Convey&#039;s Support Site]&lt;br /&gt;
&lt;br /&gt;
=== CUDA ===&lt;br /&gt;
* [[Media:CUDA_C_Programming_Guide.pdf | CUDA_C_Programming_Guide (.pdf)]]&lt;br /&gt;
* [[Media:CUDA_C_Best_Practices_Guide.pdf | CUDA_C_Best_Practices_Guide(.pdf)]]&lt;br /&gt;
* [[Media:CUDA_Memory.pdf | CUDA_Memory (.pdf)]]&lt;br /&gt;
&lt;br /&gt;
==Links==&lt;br /&gt;
* [http://www.asic-world.com www.asic-world.com] - Great Tutorials for those Learning HDLs&lt;br /&gt;
* [http://memocode.irisa.fr MemoCODE 2012]&lt;br /&gt;
** [[Media:2012-memocode-contest.pdf | MemoCODE Contest.pdf]]&lt;br /&gt;
** [http://memocode.irisa.fr/2012/2012-memocode-contest.tar.gz Reference Implementation]&lt;br /&gt;
** [ftp://ftp-trace.ncbi.nih.gov/1000genomes/ftp/technical/reference/human_g1k_v37.fasta.gz Human Reference Genome (human_g1k_v37.fasta.gz)]&lt;br /&gt;
** [ftp://ftp-trace.ncbi.nih.gov/1000genomes/ftp/data/NA06985/sequence_read/ERR050082.filt.fastq.gz Example Reads (ERR050082.filt.fastq.gz)]&lt;br /&gt;
** [http://ftp.1000genomes.ebi.ac.uk/vol1/ftp/data/NA06985/sequence_read/ERR050082.filt.fastq.gz Example Reads (Alternative Link) (ERR050082.filt.fastq.gz)]&lt;br /&gt;
&lt;br /&gt;
* [[2010 Main Page | CprE 584 2010 Wiki Main Page]]&lt;br /&gt;
* [http://class.ee.iastate.edu/cpre583/ CprE 583 Website]&lt;br /&gt;
* [http://class.ece.iastate.edu/cpre584/ CprE 584 Website]&lt;br /&gt;
&lt;br /&gt;
=== Other Articles ===&lt;br /&gt;
* [[Assignment|Assignments]]&lt;br /&gt;
* [[A quick start on CUDA]]&lt;br /&gt;
&lt;br /&gt;
== Helpful Guides ==&lt;br /&gt;
* [http://www.c7t-hdl.com/Docs/C7T_AN05_Customized_WaveView_ModelSim_ISE.pdf Modelsim and ISE]&lt;br /&gt;
* [http://www.fpga.com.cn/hdl/training/verilog%20reference%20guide.pdf The Verilog Golden Reference]&lt;br /&gt;
* [http://courseware.ee.calpoly.edu/~bmealy/shock_awe_vhdl_adobe.pdf &amp;quot;The Shock and Awe&amp;quot; VHDL Tutorial]&lt;br /&gt;
* [http://esd.cs.ucr.edu/labs/tutorial/ VHDL Simple Code Examples]&lt;br /&gt;
* [http://www.seas.upenn.edu/~ese171/vhdl/vhdl_primer.html VHDL Primer]&lt;br /&gt;
* [http://www.kxcad.net/electronic_Xilinx_guide/mergedProjects/xsim/html/xs_p_ml_instantiation.htm Using VHDL components in Verilog]&lt;br /&gt;
* [[Media:Modelsim_pe_user_10.0d.pdf | Modelsim Users Guide]]&lt;br /&gt;
* [[Useful Modelsim Commands]]&lt;br /&gt;
* [http://sn0v.wordpress.com/2012/12/07/installing-cuda-5-on-ubuntu-12-04/ Installing CUDA 5 on Ubuntu 12.04]&lt;br /&gt;
&lt;br /&gt;
== Readings for Memocode 2012 ==&lt;br /&gt;
*[[Media:Brief_Bioinform-2010-Li-473-83.pdf|A survey on algorithms for sequencing]]&lt;br /&gt;
*[[Media:Gb-2009-10-3-r25.pdf|Burrows-Wheeler indexing]]&lt;br /&gt;
&lt;br /&gt;
== Spring 2012 Teams ==&lt;br /&gt;
* [[Team Gryffindor]]&lt;br /&gt;
* [[Team Slytherin]]&lt;br /&gt;
* [[Team 142857]]&lt;br /&gt;
== Spring 2013 Teams ==&lt;br /&gt;
* [[Team Cyc05]]&lt;br /&gt;
* [[Team Challenger]]&lt;br /&gt;
* [[Team Blitz]]&lt;/div&gt;</summary>
		<author><name>Carterp</name></author>
	</entry>
</feed>